专利检索 ap:("INTEL Corporation") AND inv:"ZHU, Bing" 第 1 页

1.

发明公开
USING SECURE ENCLAVES AND DYNAMIC MEASUREMENTS 审中-公开

公开(公告)号：EP4035051A1

公开(公告)日：2022-08-03

申请号：EP19947130.1

申请日：2019-09-27

申请人： INTEL Corporation

发明人： SMITH, Ned M. , ZHU, Bing

IPC分类号： G06F21/71

2.

发明授权
METHODS, SYSTEMS AND APPARATUS TO CAPTURE ERROR CONDITIONS IN LIGHTWEIGHT VIRTUAL MACHINE MANAGERS 有权

公开(公告)号：EP2867770B1

公开(公告)日：2020-05-27

申请号：EP12880072.9

申请日：2012-06-29

申请人： Intel Corporation

发明人： ZHU, Bing , ZOU, Peng , TALLAM, Madhukar , CHEN, Luhai , WANG, Kai

IPC分类号： G06F9/455 , G06F11/07 , G06F11/34

3.

发明公开
METHODS, SYSTEMS AND APPARATUS TO CAPTURE ERROR CONDITIONS IN LIGHTWEIGHT VIRTUAL MACHINE MANAGERS 审中-公开
标题翻译：方法，系统和设备的检测误差条件的光肥胖管理设备对于虚拟计算机

公开(公告)号：EP2867770A1

公开(公告)日：2015-05-06

申请号：EP12880072.9

申请日：2012-06-29

申请人： Intel Corporation

发明人： ZHU, Bing , ZOU, Peng , TALLAM, Madhukar , CHEN, Luhai , WANG, Kai

IPC分类号： G06F9/455

CPC分类号： G06F11/3466 , G06F11/0712 , G06F11/0778

摘要： Methods and apparatus are disclosed to capture error conditions in lightweight virtual machine managers. A disclosed example method includes defining a shared memory structure between the VMM and a virtual machine (VM), when the VM is spawned by the VMM, installing an abort handler on the VM associated with a vector value, in response to detecting an error, transferring VMM state information to the shared memory structure, and invoking the abort handler on the VM to transfer contents of the shared memory structure to a non-volatile memory.

4.

发明公开
SYSTEM AND METHOD TO IMPROVE NESTED VIRTUAL MACHINE MONITOR PERFORMANCE 审中-公开

公开(公告)号：EP3333699A1

公开(公告)日：2018-06-13

申请号：EP17202655.1

申请日：2017-11-20

申请人： INTEL Corporation

发明人： ZHU, Bing , WANG, Kai , ZOU, Peng , ZHONG, Fangjian

IPC分类号： G06F9/30 , G06F9/455

CPC分类号： G06F9/30076 , G06F9/30189 , G06F9/45533 , G06F9/45558 , G06F2009/45566 , G06F2009/45583

摘要： A processing system includes a first register to store an invalidation mode flag associated with a virtual processor identifier (VPID) and a processing core, communicatively coupled to the first register, the processing core comprising a logic circuit to execute a virtual machine monitor (VMM) environment, the VMM environment comprising a root mode VMM supporting a non-root mode VMM, the non-root mode VMM to execute a virtual machine (VM) identified by the VPID, the logic circuit further comprising an invalidation circuit to execute a virtual processor invalidation (INVVPID) instruction issued by the non-root mode VMM, the INVVPID instruction comprising a reference to an INVVPID descriptor that specifies a linear address and the VPID and responsive to determining that the invalidation mode flag is set, invalidate, without triggering a VM exit event, a memory address mapping associated with the linear address.