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1.发明公开A massively parallel diagonal fold tree array processor 失效Hochgradig平行机对角线轨道器Baumtabellenprozessor。
公开(公告)号：EP0569763A2
公开(公告)日：1993-11-18
申请号：EP93106730.0
申请日：1993-04-26
IPC分类号： G06F15/80
CPC分类号： G06F15/8023
摘要： A massively parallel processor apparatus having an instruction set architecture for each of the N ² the PEs of the structure. The apparatus which we prefer will have a PE structure consisting of PEs that contain instruction and data storage units, receive instructions and data, and execute instructions. The N ² structure should contain "N" communicating ALU trees, "N" programmable root tree processor units, and an arrangement for communicating both instructions, data, and the root tree processor outputs back to the input processing elements by means of the communicating ALU trees. The apparatus can be structured as a bit-serial or word parallel system. The preferred structure contains N ² PEs, identified a s PE column,row, in a N root tree processor system, placed in the form of a N by N processor array that has been folded along the diagonal and made up of diagonal cells and general cells. The Diagonal-Cells are comprised of a single processing element identified as PE i,i of the folded N by N processor array and the General-Cells are comprised of two PEs merged together, identified as PE i,j and PE j,i of the folded N by N processor array. Matrix processing algorithms are discussed followed by a presentation of the Diagonal-Fold Tree Array Processor architecture. The Massively Parallel Diagonal-Fold Tree Array Processor supports completely connected root tree processors through the use of the array of PEs that are interconnected by folded communication ALU trees.
摘要翻译： 具有用于该结构的每个N 2个PE的指令集架构的大规模并行处理器装置。 我们喜欢的设备将具有由PE组成的PE结构，该PE包含指令和数据存储单元，接收指令和数据以及执行指令。 N 2结构应包含“N”个通信ALU树，“N”个可编程根树处理器单元，以及用于将指令，数据和根树处理器输出传送回输入处理单元的装置，借助于 传播ALU树。 该装置可以被构造为比特串行或字并行系统。 优选的结构包含在N根树处理器系统中标识为PE列，行的N 2个PE，以N×N处理器阵列的形式放置，该处理器阵列已沿对角线折叠并由对角线单元组成 细胞。 对角线电池由单个处理元件组成，标识为折叠N个N处理器阵列的PEi，i，通用单元由合并在一起的两个PE组成，标识为折叠N的PEi，j和PEj，i 由N个处理器阵列。 讨论矩阵处理算法，然后介绍对角折叠树阵列处理器架构。 大型平行对角折叠树阵列处理器通过使用通过折叠通信ALU树互连的PE阵列来支持完全连接的根树处理器。
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公开(公告)号：EP0569763A3
公开(公告)日：1994-07-13
申请号：EP93106730.0
申请日：1993-04-26
IPC分类号： G06F15/80
CPC分类号： G06F15/8023
摘要： A massively parallel processor apparatus having an instruction set architecture for each of the N ² the PEs of the structure. The apparatus which we prefer will have a PE structure consisting of PEs that contain instruction and data storage units, receive instructions and data, and execute instructions. The N ² structure should contain "N" communicating ALU trees, "N" programmable root tree processor units, and an arrangement for communicating both instructions, data, and the root tree processor outputs back to the input processing elements by means of the communicating ALU trees. The apparatus can be structured as a bit-serial or word parallel system. The preferred structure contains N ² PEs, identified a s PE column,row, in a N root tree processor system, placed in the form of a N by N processor array that has been folded along the diagonal and made up of diagonal cells and general cells. The Diagonal-Cells are comprised of a single processing element identified as PE i,i of the folded N by N processor array and the General-Cells are comprised of two PEs merged together, identified as PE i,j and PE j,i of the folded N by N processor array. Matrix processing algorithms are discussed followed by a presentation of the Diagonal-Fold Tree Array Processor architecture. The Massively Parallel Diagonal-Fold Tree Array Processor supports completely connected root tree processors through the use of the array of PEs that are interconnected by folded communication ALU trees.
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