METHOD FOR DYNAMICALLY ADJUSTING A MEMORY PAGE CLOSING POLICY
    1.
    发明授权
    METHOD FOR DYNAMICALLY ADJUSTING A MEMORY PAGE CLOSING POLICY 有权
    方法SPEICHERSEITENSCHLIESS策略的动态调整

    公开(公告)号:EP1461706B1

    公开(公告)日:2009-05-13

    申请号:EP02794434.7

    申请日:2002-12-27

    申请人: Intel Corporation

    IPC分类号: G06F12/02

    CPC分类号: G06F12/0215

    摘要: A method for dynamically adjusting a memory page-closing policy for computer systems employing various types of DRAM memory partitioned into one or more memory banks, and circuitry for implementing the method. In general, the method comprises monitoring memory accesses to memory banks and dynamically adjusting the memory page closing policy for those memory bank based on locality characteristics of its memory accesses so that memory latencies are reduced. In one embodiment, in response to memory requests from a computer system processor, memory accesses to the DRAM memory are made on a page-wise basis. As each memory page is accessed, a page-miss, page-hit or page-hit state is produced. Depending on the page access states, which generally will reflect the locality characteristics of (an) application(s) accessing the memory, a page-close set point is adjusted. When a timing count corresponding to the page exceeds the page-close set point, the memory page is closed.

    METHOD FOR DYNAMICALLY ADJUSTING A MEMORY PAGE CLOSING POLICY
    2.
    发明公开
    METHOD FOR DYNAMICALLY ADJUSTING A MEMORY PAGE CLOSING POLICY 有权
    方法SPEICHERSEITENSCHLIESS策略的动态调整

    公开(公告)号:EP1461706A1

    公开(公告)日:2004-09-29

    申请号:EP02794434.7

    申请日:2002-12-27

    申请人: INTEL CORPORATION

    IPC分类号: G06F12/02

    CPC分类号: G06F12/0215

    摘要: A method for dynamically adjusting a memory page-closing policy for computer systems employing various types of DRAM memory partitioned into one or more memory banks, and circuitry for implementing the method. In general, the method comprises monitoring memory accesses to memory banks and dynamically adjusting the memory page closing policy for those memory bank based on locality characteristics of its memory accesses so that memory latencies are reduced. In one embodiment, in response to memory requests from a computer system processor, memory accesses to the DRAM memory are made on a page-wise basis. As each memory page is accessed, a page-miss, page-hit or page-hit state is produced. Depending on the page access states, which generally will reflect the locality characteristics of (an) application(s) accessing the memory, a page-close set point is adjusted. When a timing count corresponding to the page exceeds the page-close set point, the memory page is closed.