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公开(公告)号:EP4020278A1
公开(公告)日:2022-06-29
申请号:EP21197916.6
申请日:2021-09-21
申请人: INTEL Corporation
发明人: Alameldeen, Alaa , Rozas, Carlos , Liu, Fangfei , Zou, Xiang , McKeen, Francis , Brandt, Jason W. , Nuzman, Joseph , Basak, Abhishek , Constable, Scott , Unterluggauer, Thomas , Mallick, Asit , Fernandez, Matthew
摘要: Embodiments for dynamically mitigating speculation vulnerabilities are disclosed. In an embodiment, an apparatus includes decode circuitry and execution circuitry coupled to the decode circuitry. The decode circuitry is to decode a single instruction to mitigate vulnerability to a speculative execution attack. The execution circuitry is to be hardened in response to the single instruction.
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公开(公告)号:EP4020192A1
公开(公告)日:2022-06-29
申请号:EP21198783.9
申请日:2021-09-24
申请人: Intel Corporation
发明人: Rozas, Carlos , Liu, Fangfei , Zou, Xiang , McKeen, Francis , Brandt, Jason W. , Nuzman, Joseph , Alameldeen, Alaa , Basak, Abhishek , Constable, Scott , Unterluggauer, Thomas , Mallick, Asit , Fernandez, Matthew
摘要: Embodiments for dynamically mitigating speculation vulnerabilities are disclosed. In an embodiment, an apparatus includes decode circuitry and branch circuitry coupled to the decode circuitry. The decode circuitry is to decode a branch hardening instruction to mitigate vulnerability to a speculative execution attack. The branch circuitry is to be hardened in response to the branch hardening instruction.
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公开(公告)号:EP4020281A1
公开(公告)日:2022-06-29
申请号:EP21198455.4
申请日:2021-09-23
申请人: INTEL Corporation
发明人: Rozas, Carlos , Liu, Fangfei , Zou, Xiang , McKeen, Francis , Brandt, Jason W. , Nuzman, Joseph , Alameldeen, Alaa , Basak, Abhishek , Constable, Scott , Unterluggauer, Thomas , Mallick, Asit , Fernandez, Matthew
IPC分类号: G06F21/55
摘要: Embodiments for dynamically mitigating speculation vulnerabilities are disclosed. In an embodiment, an apparatus includes decode circuitry and execution circuitry coupled to the decode circuitry. The decode circuitry is to decode a register hardening instruction to mitigate vulnerability to a speculative execution attack. The execution circuitry is to be hardened in response to the register hardening instruction.
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公开(公告)号:EP4020279A1
公开(公告)日:2022-06-29
申请号:EP21197926.5
申请日:2021-09-21
申请人: INTEL Corporation
发明人: Rozas, Carlos , Liu, Fangfei , Zou, Xiang , McKeen, Francis , Brandt, Jason W. , Nuzman, Joseph , Alameldeen, Alaa , Basak, Abhishek , Constable, Scott , Unterluggauer, Thomas , Mallick, Asit , Fernandez, Matthew
摘要: Embodiments for dynamically mitigating speculation vulnerabilities are disclosed. In an embodiment, an apparatus includes a decode circuitry and store circuitry coupled to the decode circuitry. The decode circuitry is to decode a store hardening instruction to mitigate vulnerability to a speculative execution attack. The store circuitry is to be hardened in response to the store hardening instruction.
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公开(公告)号:EP4020188A1
公开(公告)日:2022-06-29
申请号:EP21197332.6
申请日:2021-09-17
申请人: Intel Corporation
发明人: Rozas, Carlos , Liu, Fangfei , Zou, Xiang , McKeen, Francis , Brandt, Jason W. , Nuzman, Joseph , Alameldeen, Alaa , Basak, Abhishek , Constable, Scott , Unterluggauer, Thomas , Mallick, Asit , Fernandez, Matthew
摘要: Embodiments for dynamically mitigating speculation vulnerabilities are disclosed. In an embodiment, an apparatus includes decode circuitry and load circuitry coupled to the decode circuitry. The decode circuitry is to decode a load hardening instruction to mitigate vulnerability to a speculative execution attack. The load circuitry is to be hardened in response to the load hardening instruction.
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公开(公告)号:EP3699795A1
公开(公告)日:2020-08-26
申请号:EP20155110.8
申请日:2020-02-03
申请人: INTEL Corporation
发明人: Gabor, Ron , Alameldeen, Alaa , Basak, Abhishek , Liu, Fangfei , McKeen, Francis , Nuzman, Joseph , Rozas, Carlos , Yanover, Igor , Zou, Xiang
IPC分类号: G06F21/52 , G06F9/30 , G06F9/38 , G06F12/0806 , G06F12/1027 , G06F21/75
摘要: Embodiments of methods and apparatuses for restricted speculative execution are disclosed. In an embodiment, a processor includes configuration storage, an execution circuit, and a controller. The configuration storage is to store an indicator to enable a restricted speculative execution mode of operation of the processor, wherein the processor is to restrict speculative execution when operating in restricted speculative execution mode. The execution circuit is to perform speculative execution. The controller to restrict speculative execution by the execution circuit when the restricted speculative execution mode is enabled.
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