公开(公告)号：EP3979073A1

公开(公告)日：2022-04-06

申请号：EP21203400.3

申请日：2019-02-26

申请人： Intel Corporation

发明人： Sade, Raanan ,  Pons, Thierry ,  Gradstein, Amit ,  Sperber, Zeev ,  Charney, Mark J. ,  Valentine, Robert ,  Oz-Sinay, Eyal

IPC分类号： G06F9/30

摘要： Disclosed embodiments relate to efficient complex vector multiplication. In one example, a processor comprises fetch and decode circuitry to fetch and decode an instruction having fields to specify an accumulation complex vector, a multiplier complex vector, and a multiplicand complex vector, and execution circuitry, responsive to the decoded instruction, to generate a double-even multiplicand vector by duplicating even elements of the specified multiplicand complex vector into adjacent more significant odd element positions, multiply elements of the multiplier complex vector and elements from corresponding positions of the double-even multiplicand vector to generate corresponding products, accumulate the products with elements from corresponding positions of the destination complex vector, and store a result in a destination storage location.