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公开(公告)号：EP0031501B1
公开(公告)日：1984-08-22
申请号：EP80107635.7
申请日：1980-12-04
IPC分类号： G06F11/26
CPC分类号： G06F11/3648 , G01R31/31705 , G01R31/318555 , G06F11/2236
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2.发明授权
公开(公告)号：EP0319787B1
公开(公告)日：1996-06-19
申请号：EP88119573.9
申请日：1988-11-24
IPC分类号： G06T15/40
CPC分类号： G06T15/503
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3.发明公开
公开(公告)号：EP0319787A2
公开(公告)日：1989-06-14
申请号：EP88119573.9
申请日：1988-11-24
IPC分类号： G06T15/40
CPC分类号： G06T15/503
摘要： The present invention comprises a method for utilizing an socalled SIMD computer architecture in conjunction with a host processor and coordinate processor to render quality, three-dimensional, anti-aliased shaded color images into the frame buffer of a video display system. The method includes a parallel algorithm for rendering an important graphic primitive for accomplishing the production of a smoothly shaded color three-dimensional triangle with anti-aliased edges. By taking advantage of the SIMD architecture and said parallel algorithm, the very time consuming pixel by pixel computations are broken down for parallel execution. A single coordinate processor computes and transmits an overall triangle record which is essentially the same for all blocks of pixels within a given bounding box which box in turn surrounds each triangle. The individual pixel data is produced by a group of M x N pixel processors and stored in the frame buffer in a series of repetitive steps wherein each step corresponds to the processing of an M x N block of pixels within the bounding box of the triangle. Thus, each pixel processor performs the same operation, modifying its computations in accordance with triangle data received from the coordinate processor and positional data unique to its own sequential connectivity to the frame buffer, thus allowing parallel access to the frame buffer.
摘要翻译： 本发明包括一种用于与主机处理器结合所谓的SIMD计算机体系结构的利用和坐标处理器渲染质量，三维，抗混叠阴影彩色图像转换成的视频显示系统的帧缓冲器中，该方法包括一 并行算法用于实现生产平滑着色的彩色的三维三角形的具有抗混叠边缘的重要图元渲染。 通过取SIMD架构和算法所述平行的优点，由像素计算的非常费时的像素被分解为并行执行。 单个处理器计算坐标和整体上三角形记录传输所有这实质上是对于给定的边界框内反过来哪个框围绕每个三角形像素的所有块是相同的。 各个像素数据是由一组M×N个像素处理器的产生并存储在帧缓冲器中的一系列重复的步骤worin每个步骤对应于三角形的边界框内的像素的M×N个块的处理。 因此，每个像素处理器执行相同的手术，与从处理器接收和坐标位置数据独特到它自己的顺序连接到帧缓冲器三角形数据，从而允许以该帧缓冲器的并行访问修改其计算在雅舞蹈。
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4.发明公开A method of windowing image data in a computer system 失效在einem Rechnersystem的Verfahren zum Ausschneiden von Bilddaten。
公开(公告)号：EP0210554A2
公开(公告)日：1987-02-04
申请号：EP86109874.7
申请日：1986-07-18
摘要： In a method for rapid windowing of display information in a computer system image data is maintained in a hierarchical data tree structure. The complete image field (1), within which the image is defined, is divided into cells (7). The window is defined within this field and a field of possible interest (5) is defined around the window. Then, for each node in the tree, summary node data is computed which identifies those cells within the field of possible interest which are at least partially occupied by the part of the image defined at that node. By traversing the tree it is then possible to identify rapidly the image data to be windowed.
摘要翻译： 在用于在计算机系统中快速打开显示信息的方法中，图像数据被保持在分层数据树结构中。 其中定义了图像的完整图像场（1）被分成单元（7）。 该窗口在该字段内定义，并且围绕窗口定义可能感兴趣的领域（5）。 然后，对于树中的每个节点，计算汇总节点数据，其识别可能感兴趣的领域内的至少部分地被该节点定义的图像的部分占据的那些小区。 通过遍历树，可以快速识别要加窗的图像数据。
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5.发明公开Diagnostic and debugging arrangement for a data processing system 失效诊断和安全监控系统（Anordnungfürein Datenverarbeitungssystem）。
公开(公告)号：EP0031501A2
公开(公告)日：1981-07-08
申请号：EP80107635.7
申请日：1980-12-04
IPC分类号： G06F11/26
CPC分类号： G06F11/3648 , G01R31/31705 , G01R31/318555 , G06F11/2236
摘要： An arrangement is described comprising a diagnostic computer (11) connected to a host computer (12) for the purpose of troubleshooting the host computer's hardware and software. The arrangement includes an interface unit (13) comprising specific controls (31, 33, 35) with transfer and mask registers between the diagnostic computer and the host, and control units (22, 23) in the diagnostic computer, to perform functions required by the user of the system. The arrangement is specifically designed for use with a host computer comprising a level-sensitive scan (LSSD) register.
摘要翻译： 描述的装置包括连接到主计算机（12）的诊断计算机（11），用于对主计算机的硬件和软件进行故障排除。 该装置包括接口单元（13），其包括在诊断计算机和主机之间具有传送和掩码寄存器的特定控制（31,33,35）以及诊断计算机中的控制单元（22,23），以执行由 系统的用户。 该装置专门设计用于与包括电平敏感扫描（LSSD）寄存器的主计算机一起使用。
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公开(公告)号：EP0210554B1
公开(公告)日：1992-04-29
申请号：EP86109874.7
申请日：1986-07-18
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7.发明公开Data processing system comprising a common bus communication system in which the width of the address field is greater than the number of lines on the bus 失效在一个数据处理系统，其中所述地址字段的宽度比的传输线的数目大于具有公共总线的通信系统。
公开(公告)号：EP0020908A1
公开(公告)日：1981-01-07
申请号：EP80102080.1
申请日：1980-04-18
IPC分类号： G06F13/00
CPC分类号： G06F12/0215 , G06F12/0623
摘要： The technique for transmitting address information between a processor (10) and a plurality of memory subsystems (14, 18) in a common bus (4, 6, 8) communication system (2). The width of the address field is greater than the number of lines on the bus (6). For example, addresses are three bytes wide, and the bus (6) is one byte wide, thereby reducing the number of pins required on the processor and the subsystems. For communication between the processor and a given memory subsystem, only those bytes of a selected address which differ from the corresponding bytes of a previous address are transmitted sequentially for accessing a selected memory location.
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8.发明公开Parallel rendering of smoothly shaded color triangles with anti-aliased edges for a three dimensional color display 失效与三维颜色显示器相反的边缘的平滑色调三角形的平行渲染
公开(公告)号：EP0319787A3
公开(公告)日：1991-07-31
申请号：EP88119573.9
申请日：1988-11-24
IPC分类号： G06T15/40
CPC分类号： G06T15/503
摘要： The present invention comprises a method for utilizing an socalled SIMD computer architecture in conjunction with a host processor and coordinate processor to render quality, three-dimensional, anti-aliased shaded color images into the frame buffer of a video display system. The method includes a parallel algorithm for rendering an important graphic primitive for accomplishing the production of a smoothly shaded color three-dimensional triangle with anti-aliased edges. By taking advantage of the SIMD architecture and said parallel algorithm, the very time consuming pixel by pixel computations are broken down for parallel execution. A single coordinate processor computes and transmits an overall triangle record which is essentially the same for all blocks of pixels within a given bounding box which box in turn surrounds each triangle. The individual pixel data is produced by a group of M x N pixel processors and stored in the frame buffer in a series of repetitive steps wherein each step corresponds to the processing of an M x N block of pixels within the bounding box of the triangle. Thus, each pixel processor performs the same operation, modifying its computations in accordance with triangle data received from the coordinate processor and positional data unique to its own sequential connectivity to the frame buffer, thus allowing parallel access to the frame buffer.
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公开(公告)号：EP0210554A3
公开(公告)日：1990-01-31
申请号：EP86109874.7
申请日：1986-07-18
摘要： In a method for rapid windowing of display information in a computer system image data is maintained in a hierarchical data tree structure. The complete image field (1), within which the image is defined, is divided into cells (7). The window is defined within this field and a field of possible interest (5) is defined around the window. Then, for each node in the tree, summary node data is computed which identifies those cells within the field of possible interest which are at least partially occupied by the part of the image defined at that node. By traversing the tree it is then possible to identify rapidly the image data to be windowed.
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10.发明授权Data processing system comprising a common bus communication system in which the width of the address field is greater than the number of lines on the bus 失效数据处理系统包括一个通用总线通信系统，其中地址的宽度大于总线上的线路数量
公开(公告)号：EP0020908B1
公开(公告)日：1983-11-16
申请号：EP80102080.1
申请日：1980-04-18
IPC分类号： G06F13/00
CPC分类号： G06F12/0215 , G06F12/0623
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