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公开(公告)号：EP0083020B1
公开(公告)日：1989-03-01
申请号：EP82111567.2
申请日：1982-12-14
CPC分类号： H01L21/4846 , H01L23/49866 , H01L2924/0002 , H05K3/467 , H01L2924/00
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公开(公告)号：EP0083020A3
公开(公告)日：1985-04-17
申请号：EP82111567
申请日：1982-12-14
CPC分类号： H01L21/4846 , H01L23/49866 , H01L2924/0002 , H05K3/467 , H01L2924/00
摘要： A process is provided for making a multilayer integrated circuit substrate having improved via connection. A first layer M1 of chrome-copper-chrome (19-20-21) is applied to a ceramic substrate (18) and the circuits etched. A polyimide layer (22) is then applied, cured, and developed and etched to provide via holes in the polyimide down to the M1 circuitry. The top chrome (21) is now etched to expose the M1 copper (20) in the via holes. A second layer M2 of copper-chrome (23-24) is evaporated onto the polyimide (22) at a high substrate temperature to provide a copper interface at the base of the vias having no visible grain boundaries and a low resistance. M2 circuitization is then carried out.
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公开(公告)号：EP0083020A2
公开(公告)日：1983-07-06
申请号：EP82111567.2
申请日：1982-12-14
CPC分类号： H01L21/4846 , H01L23/49866 , H01L2924/0002 , H05K3/467 , H01L2924/00
摘要： A process is provided for making a multilayer integrated circuit substrate having improved via connection. A first layer M1 of chrome-copper-chrome (19-20-21) is applied to a ceramic substrate (18) and the circuits etched. A polyimide layer (22) is then applied, cured, and developed and etched to provide via holes in the polyimide down to the M1 circuitry. The top chrome (21) is now etched to expose the M1 copper (20) in the via holes. A second layer M2 of copper-chrome (23-24) is evaporated onto the polyimide (22) at a high substrate temperature to provide a copper interface at the base of the vias having no visible grain boundaries and a low resistance. M2 circuitization is then carried out.
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