摘要:
Generation of a character code for a selected alphabetic character is performed by depressing a plurality of keys in a particular sequence, until all those keys are simultaneously operated. Numerical character codes are generated by depressing only one key per numerical character. The circuitry distinguishes constituent key operations of a plural key operation from a single key operation for a numerical character. The circuitry includes a microprocessor (54), an arithmetic logic unit (54), and a storage (56) having a number of registers (R1-R5) for storing the history of depressed keys, and a character code table for read-out of character codes.
摘要:
An address word (N) for addressing a memory (2) comprises an exponent field (P) that defines on one hand the length of a memory field whereto access is obtained, on the other a number by which a second field (M) in the address word is modified, the memory being addressed by the modifying second field. A memory control unit (5) comprises an address shift register (26) for storing the second field (M) of the address word and an exponent register (26) for storing the exponent field (P). The exponent register controls on one hand the shifting of the address shift register contents, on the other the successive updating of the address being read from the address shift register into a memory address register (61).
摘要:
An address word (N) for addressing a memory (2) comprises an exponent field (P) that defines on one hand the length of a memory field whereto access is obtained, on the other a number by which a second field (M) in the address word is modified, the memory being addressed by the modifying second field. A memory control unit (5) comprises an address shift register (26) for storing the second field (M) of the address word and an exponent register (26) for storing the exponent field (P). The exponent register controls on one hand the shifting of the address shift register contents, on the other the successive updating of the address being read from the address shift register into a memory address register (61).
摘要:
In a keyboard operation two sequential keystrokes are used for generation of a character code. A rule is set up according to which some preset combinations of two sequential keystrokes are valid and other are not. The rule is implemented by storing the validity conditions into a table in a control unit. According to a preferred rule the second key to be operated must be located on a column to the right of the column where the first key is located, otherwise an error signal will be generated. The method is preferably used for a one hand keyboard with three times four keys.
摘要:
Generation of a character code for a selected alphabetic character is performed by depressing a plurality of keys in a particular sequence, until all those keys are simultaneously operated. Numerical character codes are generated by depressing only one key per numerical character. The circuitry distinguishes constituent key operations of a plural key operation from a single key operation for a numerical character. The circuitry includes a microprocessor (54), an arithmetic logic unit (54), and a storage (56) having a number of registers (R1-R5) for storing the history of depressed keys, and a character code table for read-out of character codes.