公开(公告)号：EP2979388A4

公开(公告)日：2016-10-19

申请号：EP14785898

申请日：2014-04-15

申请人： KANDOU LABS SA

发明人： HOLDEN BRIAN ,  FOX JOHN ,  HORMATI ALI ,  HUNT PETER ,  KEAY JOHN ,  SHOKROLLAHI AMIN ,  SIMPSON RICHARD ,  SINGH ANANT ,  STEWART ANDREW ,  SURACE GIUSEPPE ,  ULRICH ROGER

IPC分类号： H04L5/02 ,  H04L25/02 ,  H04L25/03 ,  H04L25/08 ,  H04L25/14 ,  H04L25/49 ,  H04L27/01

CPC分类号： H04L25/085 ,  H03M5/04 ,  H03M5/16 ,  H03M13/31 ,  H04L1/0041 ,  H04L1/0057 ,  H04L5/02 ,  H04L25/0272 ,  H04L25/0282 ,  H04L25/03057 ,  H04L25/03146 ,  H04L25/03343 ,  H04L25/03885 ,  H04L25/14 ,  H04L25/4919 ,  H04L27/01 ,  H04L2001/0094 ,  H04L2025/03426

摘要： Systems and methods are described for transmitting data over physical channels to provide a high bandwidth, low latency interface between a transmitting device and a receiving device operating at high speed with low power utilization. Communication is performed using group signaling over sets of four wires using a vector signaling code, where each wire of a set carries a low-swing signal that may take on one of four signal values. Topologies and designs of wire sets are disclosed with preferred characteristics for group signaling communications.

公开(公告)号：EP2926260A4

公开(公告)日：2016-08-10

申请号：EP14740574

申请日：2014-01-17

申请人： KANDOU LABS SA

发明人： HOLDEN BRIAN ,  FOX JOHN ,  HUNT PETER ,  KEAY JOHN ,  SHOKROLLAHI AMIN ,  SIMPSON RICHARD ,  SINGH ANANT ,  STEWART ANDREW ,  SURACE GIUSEPPE

IPC分类号： H04L25/02 ,  G06F13/00 ,  H03M5/16 ,  H04L25/493

CPC分类号： H04L25/4906 ,  G06F13/426 ,  H03M5/16 ,  H03M5/20 ,  H04L25/0272 ,  H04L25/4917 ,  H04L25/493 ,  H04L69/04 ,  Y02B60/1228 ,  Y02B60/1235 ,  Y02D10/14 ,  Y02D10/151

摘要： Systems and methods are described for transmitting data over physical channels to provide a high speed, low latency interface such as between a memory controller and memory devices with significantly reduced or eliminated Simultaneous Switching Output noise. Controller-side and memory-side embodiments of such channel interfaces are disclosed which do not require additional pin count or data transfer cycles, have low power utilization, and introduce minimal additional latency. In some embodiments of the invention, three or more voltage levels are used for signaling.

摘要翻译： 系统和方法被描述为发射过的物理信道数据，以提供一种高速，低等待时间的接口：诸如存储器控制器和存储器设备具有显着降低或消除同步开关输出噪声之间。 求信道接口中的控制装置侧和存储器侧的实施例是盘哪个游离缺失不需要额外的管脚数或数据传送周期，具有低功率的利用率，并引入最小的附加等待时间。 在本发明的一些实施例中，三个或更多个电压电平被用于信令。