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    Electronic dispersion compensation for low-cost distributed feedback-directly modulated laser
    2.
    发明公开
    Electronic dispersion compensation for low-cost distributed feedback-directly modulated laser 有权
    激光打印机，激光打标机，激光打标机，激光打标机，激光打标机

    公开(公告)号：EP2866362A2

    公开(公告)日：2015-04-29

    申请号：EP14188654.9

    申请日：2014-10-13

    Applicant: Korea Advanced Institute of Science and Technology

    Inventor： Bae, Hyeon Min ,  Kwon, Kyeong Ha ,  Yoon, Jong Hyeok

    IPC: H04B10/2513 ,  H04B10/58

    CPC classification number: H04B10/58 ,  H04B10/25137

    Abstract: Exemplary embodiments of the present invention relate to electronic dispersion compensation (EDC). The interaction between the frequency chirp and the fiber dispersion is newly analyzed. The linear and nonlinear properties of the chirp-dispersion are separately analyzed. A pre-compensating transmitter may consist of a phase interpolator (PI), a 2 tap data generator, a pulse widening CLK generator, a rising pattern detector, 4:1 Mux and an output driver. A post-compensating receiver may consist of linear equalizer for the rabbit ear compensation, nonlinear equalizer for tilting compensation, typical high frequency boosting equalizer (EQ) and limiting amp (LA).

    Abstract translation: 本发明的示例性实施例涉及电子色散补偿（EDC）。 频率啁啾与光纤色散之间的相互作用得到新的分析。 分析了啁啾色散的线性和非线性特性。 预补偿发射机可以包括相位内插器（PI），2抽头数据发生器，脉冲加宽CLK发生器，上升模式检测器，4:1复用器和输出驱动器。 后补偿接收机可以由用于兔耳补偿的线性均衡器，用于倾斜补偿的非线性均衡器，典型的高频增益均衡器（EQ）和限幅器（LA））组成。

    Internal jitter tolerance tester with an internal jitter generator
    3.
    发明公开
    Internal jitter tolerance tester with an internal jitter generator 审中-公开
    Interner Jittertoleranztester mit einem internen Jittergenerator

    公开(公告)号：EP2876835A2

    公开(公告)日：2015-05-27

    申请号：EP14191248.5

    申请日：2014-10-31

    Applicant: Korea Advanced Institute Of Science And Technology ,  Terasquare Co., Ltd

    Inventor： Bae, Hyeon Min ,  Lee, Joon Yeong ,  Park, Jin Ho ,  Kim, Tae Ho

    IPC: H04L1/20

    CPC classification number: H04L1/205 ,  G01R31/31709 ,  H04L1/244

    Abstract: Exemplary embodiments of the present invention relate to an internal jitter tolerance tester. The internal jitter tolerance tester may include a digital loop filter consisting of a cyclic accumulator which accumulates a phase detector's output, a gain multiplier, an internal accumulated jitter generator (or an internal sinusoid jitter generator), and a phase rotator (or DCO) controller.
    The internal accumulated jitter generator may include a PRBS generator, a digital loop filter, an accumulator, and a gain controller. The PRBS generator may generate 1 and -1 randomly and the subsequent accumulator may accumulate the random signal. The lowpass filter may be used to eliminate the high frequency spur and the quantization noise. The gain controller may control an amount of the accumulated jitter.
    The accumulated jitter generator also may be replaced with the internal sinusoid jitter generator. The internal sinusoid jitter generator may include a counter, a sinusoid jitter profile lookup table, and a gain controller. A size of the counter may be proportional to the maximum period of the sinusoid jitter and the frequency of the sinusoid jitter may be controlled by selecting a speed of the counter. The counter number may select a value of the jitter from the sinusoid jitter profile lookup table, and the gain controller may control the amplitude of the jitter.

    Abstract translation: 本发明的示例性实施例涉及内部抖动容限测试器。 内部抖动容差测试器可以包括一个数字环路滤波器，它包括累积相位检测器输出的循环累加器，增益乘法器，内部累积抖动发生器（或内部正弦曲线抖动发生器）以及相位旋转器（或DCO）控制器 。 内部累积抖动发生器可以包括PRBS发生器，数字环路滤波器，累加器和增益控制器。 PRBS生成器可以随机生成1和-1，随后的累加器可以累积随机信号。 低通滤波器可用于消除高频杂波和量化噪声。 增益控制器可以控制累积抖动的量。 累积抖动发生器也可以用内部正弦曲线发生器代替。 内部正弦曲线抖动发生器可以包括计数器，正弦波抖动曲线查找表和增益控制器。 计数器的大小可以与正弦波抖动的最大周期成比例，并且可以通过选择计数器的速度来控制正弦波抖动的频率。 计数器号可以从正弦波抖动曲线查找表中选择抖动值，并且增益控制器可以控制抖动的幅度。

    Internal jitter tolerance tester with an internal jitter generator
    5.
    发明公开
    Internal jitter tolerance tester with an internal jitter generator 审中-公开
    内部Jittertoleranztester具有内部抖动

    公开(公告)号：EP2876835A3

    公开(公告)日：2015-09-30

    申请号：EP14191248.5

    申请日：2014-10-31

    Applicant: Korea Advanced Institute Of Science And Technology ,  Terasquare Co., Ltd

    Inventor： Bae, Hyeon Min ,  Lee, Joon Yeong ,  Park, Jin Ho ,  Kim, Tae Ho

    IPC: H04L1/20 ,  H04L1/24 ,  G01R31/317

    CPC classification number: H04L1/205 ,  G01R31/31709 ,  H04L1/244

    Abstract: Exemplary embodiments of the present invention relate to an internal jitter tolerance tester. The internal jitter tolerance tester may include a digital loop filter consisting of a cyclic accumulator which accumulates a phase detector's output, a gain multiplier, an internal accumulated jitter generator (or an internal sinusoid jitter generator), and a phase rotator (or DCO) controller.
    The internal accumulated jitter generator may include a PRBS generator, a digital loop filter, an accumulator, and a gain controller. The PRBS generator may generate 1 and -1 randomly and the subsequent accumulator may accumulate the random signal. The lowpass filter may be used to eliminate the high frequency spur and the quantization noise. The gain controller may control an amount of the accumulated jitter.
    The accumulated jitter generator also may be replaced with the internal sinusoid jitter generator. The internal sinusoid jitter generator may include a counter, a sinusoid jitter profile lookup table, and a gain controller. A size of the counter may be proportional to the maximum period of the sinusoid jitter and the frequency of the sinusoid jitter may be controlled by selecting a speed of the counter. The counter number may select a value of the jitter from the sinusoid jitter profile lookup table, and the gain controller may control the amplitude of the jitter.

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