摘要:
Previously known high-power switching modules are provided with serially connected individual switching stages, each of which encompasses a semiconductor switch and a triggering network that is fitted with a fixed control resistor, each semiconductor switch being set to a fixed operating point by means of said triggering network without taking into account operating conditions that vary over time, thus preventing the switching process from being highly synchronized. In order to obtain high switching synchronism (switching on and off) within a tight time slot (ZF) of less than 1.5 ns, the inventive high-power switching module comprises a delaying element (VEN) with a passive compensation loop or an active control loop in each switching stage (SSN) in addition to symmetrizing resistors (ERN) that are connected parallel to the semiconductor switches (HLN) so as to evenly distribute the voltage in the triggering network (ANN). Said delaying element (VEN) takes into account the switching time of the semiconductor switches (HLN), which is different as a result of operating conditions, by continuously adjusting an offset voltage for each switching stage from a component-related basic static value and a voltage-related and temperature-related dynamic temporary value, and thus by delaying all semiconductor switches (HLN) relative to one another in a variably adjustable manner for each switching stage.