利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

8 条记录 (耗时 0.016 秒)

    IMPLANTABLE MEDICAL DEVICE INCORPORATING ADIABATIC CLOCK-POWERED LOGIC
    1.
    发明公开
    IMPLANTABLE MEDICAL DEVICE INCORPORATING ADIABATIC CLOCK-POWERED LOGIC 有权
    具有绝热UHRBETRIEBENEN LOGIC植入医疗装置

    公开(公告)号：EP1259289A2

    公开(公告)日：2002-11-27

    申请号：EP01912966.7

    申请日：2001-02-23

    申请人： MEDTRONIC, INC.

    发明人： SCHU, Carl, A. ,  GREENINGER, Daniel, R. ,  THOMPSON, David, L.

    IPC分类号： A61N1/365

    CPC分类号： A61N1/375 ,  A61N1/362 ,  A61N1/372

    摘要： Improved operating system architecture for an implantable medical device incorporating adiabatic clock-powered logic alone or in conjunction with conventional clocked logic or self-timed logic for reducing power consumption and increasing and improving processing capabilities is disclosed. The adiabatic clock-powered logic is employed to implement digital signal processors (DSPs) including analog to digital (ADC) signal converters, a state machine or the components of microprocessor cores, e.g., the CPU, arithmetic logic units (ALU), on-chip RAM and ROM and data and control buses, and other logic units, e.g., additional RAM and ROM, a direct memory address (DMA) controller, a block mover/reader, a cyclic redundancy code (CRC) calculator, and certain uplink and downlink telemetry signal processing stages. The adiabatic clocked CMOS logic is incorporated into the same IC or ICs with clocked CMOS logic and provides manufacturing economies.

    IMPLANTABLE MEDICAL DEVICE INCORPORATING SELF-TIMED LOGIC
    2.
    发明授权
    IMPLANTABLE MEDICAL DEVICE INCORPORATING SELF-TIMED LOGIC 有权
    具有自定时LOGIC植入医疗装置

    公开(公告)号：EP1259288B1

    公开(公告)日：2004-08-11

    申请号：EP01911146.7

    申请日：2001-02-23

    申请人： MEDTRONIC, INC.

    发明人： SCHU, Carl, A. ,  GREENINGER, Daniel, R. ,  THOMPSON, David, L.

    IPC分类号： A61N1/365

    CPC分类号： A61N1/378 ,  A61N1/3627 ,  A61N1/3708

    摘要： Improved operating system architecture for an implantable medical device incorporating self-timed logic for reducing power consumption and increasing and improving processing capabilities is disclosed. The self-timed logic is employed to implement digital signal processors (DSPs) including analog to digital (ADC) signal converters, a state machine or the components of microprocessor cores, e.g., the CPU, arithmetic logic units (ALU),on-chip RAM and ROM and data and control buses, and other logic units, e.g., additional RAM and ROM, a direct memory address (DMA) controller, a block mover/reader, a cyclic redundancy code (CRC) calculator, and certain uplink and downlink telemetry signal processing stages. The self-timed CMOS logic is incorporated into the same IC or ICs with clocked CMOS logic in a manner that minimizes the size of the clock tree serving the clocked CMOS logic, allows for efficient allocation of chip real estate, and provides manufacturing economies.

    WAVEFORMS FOR ELECTRICAL STIMULATION THERAPY
    6.
    发明公开
    WAVEFORMS FOR ELECTRICAL STIMULATION THERAPY 审中-公开
    曲线地图电刺激疗法

    公开(公告)号：EP2480283A1

    公开(公告)日：2012-08-01

    申请号：EP10757921.1

    申请日：2010-09-21

    申请人： Medtronic, Inc.

    发明人： STARKEBAUM, Warren, L. ,  MAUDE-GRIFFIN, Roland, C. ,  FIRESTONE, Elizabeth, D. ,  SCHU, Carl, A. ,  SOYKAN, Orhan

    IPC分类号： A61N1/36

    CPC分类号： A61N1/36007 ,  A61N1/36085 ,  A61N1/36171 ,  A61N1/36175

    摘要： In some examples, the disclosure relates to a systems, devices, and techniques for delivering electrical stimulation therapy to a patient. In one example, the disclosure relates to a method including delivering a series of pulses with alternating pulse polarities to a gastrointestinal tract of a patient. The series of pulses includes at least a first pulse of a first polarity, a second pulse of a second polarity, and a third pulse of the first polarity, where the first, second and third pulses are delivered in direct succession and in that order. The first and second pulses are separated by a first time delay and the second and third pulses are separated by a second time delay. In some examples, each of the first and second time delays depend on the frequency that the series of pulses are delivered.

    IMPLANTABLE MEDICAL DEVICE INCORPORATING SELF-TIMED LOGIC
    8.
    发明公开
    IMPLANTABLE MEDICAL DEVICE INCORPORATING SELF-TIMED LOGIC 有权
    具有自定时LOGIC植入医疗装置

    公开(公告)号：EP1259288A2

    公开(公告)日：2002-11-27

    申请号：EP01911146.7

    申请日：2001-02-23

    申请人： MEDTRONIC, INC.

    发明人： SCHU, Carl, A. ,  GREENINGER, Daniel, R. ,  THOMPSON, David, L.

    IPC分类号： A61N1/365

    CPC分类号： A61N1/378 ,  A61N1/3627 ,  A61N1/3708

    摘要： Improved operating system architecture for an implantable medical device incorporating self-timed logic for reducing power consumption and increasing and improving processing capabilities is disclosed. The self-timed logic is employed to implement digital signal processors (DSPs) including analog to digital (ADC) signal converters, a state machine or the components of microprocessor cores, e.g., the CPU, arithmetic logic units (ALU),on-chip RAM and ROM and data and control buses, and other logic units, e.g., additional RAM and ROM, a direct memory address (DMA) controller, a block mover/reader, a cyclic redundancy code (CRC) calculator, and certain uplink and downlink telemetry signal processing stages. The self-timed CMOS logic is incorporated into the same IC or ICs with clocked CMOS logic in a manner that minimizes the size of the clock tree serving the clocked CMOS logic, allows for efficient allocation of chip real estate, and provides manufacturing economies.