公开(公告)号：EP1213865A4

公开(公告)日：2006-12-06

申请号：EP00949946

申请日：2000-07-31

申请人： MITSUBISHI ELECTRIC CORP ,  KDD SUBMARINE CABLE SYS INC

发明人： MUNEHIRA HIROAKI ,  MIZUOCHI TAKASHI ,  TAKEMURA NOBUYUKI ,  SHIMIZU KATSUHIRO ,  SHIBANO EIICHI ,  YASUDA TADAMI ,  OKAYASU ATSUKO

IPC分类号： H01S3/067 ,  H04B10/03 ,  H04B10/2537 ,  H04B10/294 ,  H04J14/02 ,  H01S3/06 ,  H04B10/18

CPC分类号： H04J14/0221 ,  H01S3/06795 ,  H04B10/506 ,  H04B10/564 ,  H04B10/58 ,  H04J14/02

摘要： Spontaneous emission laser beams are outputted using optical amplifiers (12a, 12b) each having an input end terminated without reflection and passed, respectively, through band-pass filters (13a, 13b) to produce band-pass filtered spectrum slice beams, which are multiplexed to produce a modulation beam as a dummy beam.

公开(公告)号：EP1220483A4

公开(公告)日：2005-09-07

申请号：EP00948348

申请日：2000-07-31

申请人： MITSUBISHI ELECTRIC CORP ,  KDD SUBMARINE CABLE SYS INC

发明人： YAMANAKA SHIGEO ,  MIZUOCHI TAKASHI ,  SHIMIZU KATSUHIRO ,  GOTO KOJI ,  NAKAGAWA SHINICHI ,  SHIBANO EIICHI ,  YASUDA TADAMI

IPC分类号： G02B6/26 ,  G02B6/34 ,  H04B10/50 ,  H04J14/02 ,  G02B6/12 ,  H04B10/155 ,  H04B10/18

CPC分类号： H04B10/50 ,  G02B6/266 ,  G02B6/29376 ,  H04J14/02 ,  H04J14/0221

摘要： A transmitter/receiver comprises a master rack (20, 200) and slave racks (30, 300) that can be coupled to the master rack. In the initial operation, the master rack handles a predetermined number of light-wave signals. As the demand for light-wave signals increases, slave racks are accordingly coupled without interrupting the initial operation.

公开(公告)号：EP1152541A4

公开(公告)日：2007-01-03

申请号：EP00979951

申请日：2000-12-06

申请人： MITSUBISHI ELECTRIC CORP ,  KDD SUBMARINE CABLE SYS INC

发明人： KUBO KAZUO ,  YOSHIDA HIDEO ,  ICHIBANGASE HIROSHI ,  TAGA HIDENORI ,  SHIBANO EIICHI ,  YASUDA TADAMI

IPC分类号： H03M13/15 ,  H03M13/27 ,  H03M13/29 ,  H04J3/00 ,  H04L1/00

CPC分类号： H03M13/2921 ,  H03M13/15 ,  H03M13/1515 ,  H03M13/2721 ,  H03M13/6561

摘要： An FEC frame forming method and an FEC multiplexing method, wherein the order of information is rearranged by a first interleave circuit (32), a first error correcting code is formed by an RS (239, 223) encoding circuit (33), the order is arranged back into the original order by a first deinterleave circuit (34), and a second error correcting code is formed by an RS (255, 239) encoding circuit (5). The second error correcting code is decoded by an RS (255, 239) decoding circuit (11) to correct errors in the information, the order of information is rearranged by a second interleave circuit (35), the first error correcting code is decoded by an RS (239, 223) decoding circuit (36) to correct the remaining errors in the information, and the order is arranged back into the original order by a second deinterleave circuit (37).