公开(公告)号：EP4020244A1

公开(公告)日：2022-06-29

申请号：EP21215712.7

申请日：2021-12-17

申请人： Micron Technology, Inc.

发明人： CORBETTA, Simone ,  CAPRÍ, Antonino ,  IANNUZZI, Alessandro Lucio ,  LEONINI, Filippo

IPC分类号： G06F13/16

摘要： Various embodiments provide a memory system architecture for heterogeneous memory technologies, which can be implemented by a memory sub-system. A memory system architecture of some embodiments can support servicing an individual command request using different (heterogeneous) memory technologies, such as different types of memory devices (e.g., heterogeneous memory devices), different types of memory device controllers (e.g., heterogeneous memory device controllers), different types of data paths (e.g., data paths with different protocols or protocol constrains), or some combination thereof. According to various embodiments, the memory system architecture uses tracking and management of multiple command responses to service a single command request from a host system.