a processing unit (201, 202, 203,204); a memory (L-Cst1) at least a software component (201, 202, 203, 204) implemented on a processing unit and using said memory, each software component including :
o a set of attributes, each attribute being a pointer to a particular location of a memory in which configuration data are stored, these configuration data defining features of the software component, at least a run attribute defining a run-time process for processing the data in the software component; o a reconfigure method adapted to switch the linkage of an attribute from an initial location in said memory to a final location in said memory;
means for triggering on request the reconfigure method for the or each software component; means for activating the run-time process defined by the run attribute of the or each software component according to a predetermined schedule.
摘要:
The invention concerns a decimation filter for decimation of a digital signal by a rational decimation factor ( R ) including :
a cascade of integrators (12), at least a comb branch (16A, 16B) including
a decimator (18A, 18B), a cascade of differentiators (22A, 22B),
It includes :
a first and a second comb branches (16A, 16B) both adapted to receive the samples from said cascade of integrators (12), the decimators (18A, 18B) of the first and second comb branches having a first and a second integer decimation factors ( R 1 , R 2 ) which are different, switching means (26, 28) for delivering at the output of the filter successively a first set of consecutive samples outputted by the first comb branch (16A) and a second set of consecutive samples outputted by the second comb branch (16B).