公开(公告)号：EP1965536A1

公开(公告)日：2008-09-03

申请号：EP07002520.0

申请日：2007-02-06

申请人： Mitsubishi Electric Information Technology Centre Europe B.V. ,  MITSUBISHI DENKI KABUSHIKI KAISHA

发明人： Chauviere, Benoìt ,  Bouttier, Arnaud ,  Brunel, Loïc

IPC分类号： H04L5/02

CPC分类号： H04L5/023 ,  H04J11/0069 ,  H04L1/0068 ,  H04L1/0071 ,  H04L5/0044 ,  H04L5/006

摘要： The invention concerns multi-carrier based digital telecommunication systems where the channel is used to transport several data streams according to the frequency division multiple access scheme.
The proposed method concerns a mapping of data on physical resource in a transmission system where data of elementary streams is distributed over several physical resource blocks, and within each resource block in order to get data from a plurality or elementary streams on at least one sub-carrier and at least a symbol time of each physical resource block. This allows to achieve a good diversity of the allocation of the different streams, leading to the advantage, among others, that poor transmission conditions affecting a particular sub-carrier or a particular time duration, will not concentrate its effects on a particular stream.

摘要翻译： 本发明涉及其中信道被用于多个数据流gemäß输送到频分多址方案的多载波基础的数字电信系统。 所提出的方法涉及其中基本流的数据分布在多个物理资源块上在传输系统中的物理资源的数据的映射，并且每个资源块内，以获得从至少一个子多个或一基本流数据 载体和至少每个物理资源块的码元时间。 这允许实现不同流的分配的一个很好的多样性，导致优势，除其他外，确实较差的传输条件影响特定子载波或特定时间段，不会集中在一个特定流的影响。

公开(公告)号：EP2144173A1

公开(公告)日：2010-01-13

申请号：EP08159854.2

申请日：2008-07-07

申请人： Mitsubishi Electric R&D Centre Europe B.V. ,  Mitsubishi Denki Kabushiki Kaisha

发明人： Bouttier, Arnaud ,  Nourisson, Xavier MITSUBISHI ELECTRIC ITE

IPC分类号： G06F17/14

CPC分类号： G06F17/142 ,  G06F17/144

摘要： The invention presented in this document deals with the hardware implementation of the General Prime Factor Algorithm (GPFA) on integrated circuits on the purpose of minimizing both the complexity and the latency. It proposes a device to implement discrete Fourier transforms in a self-sorting and in-place manner for composite sizes that can be factorized into the product of mutually prime numbers, where some or all of these numbers can expressed as the power of a given base number. The described DFT device is able to dynamically changing the size of the DFT between two consecutive transforms. Derivations of the proposed algorithm are presented to further reduce the latency at the expense of an increased complexity.

摘要翻译： 本文中提出的发明涉及集成电路上的通用优先因子算法（GPFA）的硬件实现，以便最小化复杂性和延迟。 它提出了一种用于以自分类和就地方式实现离散傅立叶变换的装置，用于复合尺寸，其可以被分解为相互质数的乘积，其中这些数字中的一些或全部可以表示为给定基数的幂 数。 所描述的DFT设备能够在两个连续的变换之间动态地改变DFT的大小。 提出了所提出的算法的推导，以进一步降低延迟，牺牲增加的复杂性。