公开(公告)号：EP0142167A3

公开(公告)日：1986-08-06

申请号：EP84113700

申请日：1984-11-13

申请人： NEC CORPORATION ,  NIPPON TELEGRAPH AND TELEPHONE CORPORATION

发明人： Mitami, Masataka c/o NEC Corporation ,  Matsuura, Takashi c/o NEC Corporation ,  Habuka, Tatsuji ,  Kimura, Tadakatsu

IPC分类号： H03K19/094

CPC分类号： H03K19/018521

摘要： A level shifting circuit for level shifting an input signal so as to correspond with the operating level of a logic circuit of the next stage. The level shifting circuit comprises a first CMOS inverting amplifier circuit (At) without provision of a feedback loop and a second CMOS inverting amplifier circuit (A 2 ) whose output is coupled to the input through a low impedance element (L1), either the input or the output of the second amplifier circuit (A 2 ) being connected to the input of the first amplifier circuit (A 1 . The second amplifier circuit (Aa) functions as an auto-bias circuit with respect to the first amplifier circuit (A 1 ). The level shifting circuitthus formed makes it possible to remarkably reduce power consumption and occupation area when configured as an integrated circuit.