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公开(公告)号：EP0227393B1
公开(公告)日：1995-02-22
申请号：EP86309705.1
申请日：1986-12-12
发明人： Odate, Hitoshi , Takahashi, Hisao , Suzuki, Toshio , Nojima, Toshio , Nishiki, Sadayuki , Fujii, Teruya
IPC分类号： H04B7/155
CPC分类号： H04B7/15535 , H04B1/525 , H04B7/15578
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公开(公告)号：EP0552601A3
公开(公告)日：1993-12-08
申请号：EP93100085.5
申请日：1993-01-05
CPC分类号： G01R25/08 , H03D13/001 , H03L7/091 , H03L7/183
摘要： A modulus counter (13B) counts first clock pulses (PCK1) to modulus M and ouputs the count value (Cm) as an m-bit reference signal (S R ), M being an integer. A latch circuit (14) samples and holds the reference signal in response to a trigger signal (Tr) generated by a trigger signal generator (17) in synchronism with an input signal (Sx). A high-speed counter (16) is supplied with second clock pulses (PCK2) of a frequency higher than that of the first clock pulses and starts counting the second clock pulses in response to the trigger signal and stops the counting in response to a first one of the first clock pulses immediately thereafter. A data processor (18) converts the n-bit count value (Cn) of the high-speed counter to n-bit data corresponding to a phase fraction of a phase quantization step in the latch, combines the n-bit data as low-order bits with m-bit data from the latch and outputs the combined data as phase difference data.
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公开(公告)号：EP0539224A3
公开(公告)日：1993-08-11
申请号：EP92309741.4
申请日：1992-10-23
申请人： JAPAN RADIO CO., LTD , NIPPON TELEGRAPH AND TELEPHONE CORPORATION , NTT MOBILE COMMUNICATIONS NETWORK INC.
摘要： In a receiver comprising a receiver filter (12) with a frequency attenuation band and a pilot oscillator (25) for generating a pilot oscillation signal with a pilot frequency in the frequency attenuation band, a coupler (26) couples the pilot oscillation signal and a filtered receiver signal of the receiver filter into a coupled signal. A low noise amplifier (13) amplifies the coupled signal into an amplified signal which comprises an amplified receiver signal derived from the filtered receiver signal and an amplified pilot oscillation signal derived from the pilot oscillation siganl. A branching filter (27) branches the amplified signal into the amplified receiver signal and the amplified pilot oscillation signal. A pilot signal detector unit (28) detects the amplified pilot oscillation signal to produce a direct pilot signal. A failure monitoring unit (29) monitors the direct pilot signal to produce a fault signal when the direct pilot signal is found faulty.
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公开(公告)号：EP0227393A2
公开(公告)日：1987-07-01
申请号：EP86309705.1
申请日：1986-12-12
发明人： Odate, Hitoshi , Takahashi, Hisao , Suzuki, Toshio , Nojima, Toshio , Nishiki, Sadayuki , Fujii, Teruya
IPC分类号： H04B7/155
CPC分类号： H04B7/15535 , H04B1/525 , H04B7/15578
摘要： A radio repeater includes a circuit for monitoring the spillover signal (6) from a transmitting antenna (3) to a receiving antenna (1). The repeater includes a frequency converter (12,10) which slightly offsets the transmitted frequency (f₁+Δf) from the received service signal frequency (f₁); and a signal detector (14) which measures the offset frequency component Δf) in the received signal. The offset frequency is preferably around 100Hz, so that it is higher than the fading frequency of the received signal, but is low enough not to affect the operation of remote receivers receiving the transmitted signal. The measured spillover level is used to control the gain of the repeater and/or to cancel the spillover signal, so that the repeater can have the maximum gain which can be achieved without suffering from oscillation.
摘要翻译： 无线电中继器包括用于监视从发射天线（3）到接收天线（1）的溢出信号（6）的电路。 中继器包括频率转换器（12,10），该频率转换器从接收到的服务信号频率（f1）稍微偏移发送频率（f1 + DELTA f）; 以及测量接收信号中的偏移频率分量DELTA f的信号检测器（14）。 偏移频率优选为大约100Hz，使得它高于接收信号的衰落频率，但是足够低，不会影响接收发送信号的远程接收机的操作。 测量的溢出电平用于控制中继器的增益和/或消除溢出信号，使得中继器可以具有可以在不受振荡的情况下实现的最大增益。
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公开(公告)号：EP0466123B1
公开(公告)日：1996-06-19
申请号：EP91111442.9
申请日：1991-07-09
IPC分类号： H03F1/32
CPC分类号： H03F1/3235 , H03F2201/3212
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公开(公告)号：EP0552601B1
公开(公告)日：1996-11-13
申请号：EP93100085.5
申请日：1993-01-05
CPC分类号： G01R25/08 , H03D13/001 , H03L7/091 , H03L7/183
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公开(公告)号：EP0552601A2
公开(公告)日：1993-07-28
申请号：EP93100085.5
申请日：1993-01-05
CPC分类号： G01R25/08 , H03D13/001 , H03L7/091 , H03L7/183
摘要： A modulus counter (13B) counts first clock pulses (PCK1) to modulus M and ouputs the count value (Cm) as an m-bit reference signal (S R ), M being an integer. A latch circuit (14) samples and holds the reference signal in response to a trigger signal (Tr) generated by a trigger signal generator (17) in synchronism with an input signal (Sx). A high-speed counter (16) is supplied with second clock pulses (PCK2) of a frequency higher than that of the first clock pulses and starts counting the second clock pulses in response to the trigger signal and stops the counting in response to a first one of the first clock pulses immediately thereafter. A data processor (18) converts the n-bit count value (Cn) of the high-speed counter to n-bit data corresponding to a phase fraction of a phase quantization step in the latch, combines the n-bit data as low-order bits with m-bit data from the latch and outputs the combined data as phase difference data.
摘要翻译： 模数计数器（13B）将第一时钟脉冲（PCK1）计数为模数M，并将计数值（Cm）输出为m位参考信号（SR），M为整数。 锁存电路（14）响应于与输入信号（Sx）同步的由触发信号发生器（17）产生的触发信号（Tr），对参考信号进行采样和保持。 高速计数器（16）被提供有比第一时钟脉冲高的频率的第二时钟脉冲（PCK2），并且响应于触发信号开始对第二时钟脉冲进行计数，并响应于第一时钟脉冲 其后的第一个时钟脉冲之一。 数据处理器（18）将高速计数器的n比特计数值（Cn）转换成与锁存器中的相位量化步长的相位分数对应的n比特数据，将n比特数据组合成低 来自锁存器的m位数据的顺序位，并输出组合数据作为相位差数据。
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公开(公告)号：EP0552059A1
公开(公告)日：1993-07-21
申请号：EP93300273.5
申请日：1993-01-15
申请人： JAPAN RADIO CO., LTD , NIPPON TELEGRAPH AND TELEPHONE CORPORATION , NTT MOBILE COMMUNICATIONS NETWORK INC.
发明人： Sakamoto, Hironori c/o Japan Radio Co., Ltd. , Ito, Akira, c/o Japan Radio Co., Ltd. , Nojima, Toshio
IPC分类号： H03F1/32
CPC分类号： H03F1/3229 , H03F3/602 , H03F2201/3218
摘要： For supply to first and second feedforward distortion compensating circuits 33(1), 33(2) connected in parallel, a two-divider 31 divides into signals of a common phase and a common amplitude an input radio frequency signal supplied to an input terminal 11. A two-combiner 35 combines component outputs of the feedforward circuits in inphase as an amplified output signal which is supplied to an output terminal 13. In general, N feedforward circuits (N being an integer not less than two) are connected in parallel and are supplied with the input radio frequency signal through an N-divider. Component outputs of the feedforward circuits are combined in inphase as the output signal by an N-combiner. Alternatively, the input radio frequency signal is divided into signals of a predetermined phase difference and of a common amplitude by the N-divider. In this case, the component outputs of the feedforward circuits are combined in a phase of cancelling the predetermined phase difference by the N-combiner.
摘要翻译： 为了供给并联连接的第一和第二前馈失真补偿电路33（1），33（2），二分频器31将提供给输入端子11的输入射频信号分为公共相位和公共振幅信号 双组合器35将前馈电路的分量输出同相作为被提供给输出端子13的放大输出信号。通常，N个前馈电路（N为不小于2的整数）并联连接， 通过N分频器提供输入射频信号。 前馈电路的分量输出由N组合器同相作为输出信号组合。 或者，输入射频信号被N分频器分成预定相位差和公共振幅的信号。 在这种情况下，前馈电路的分量输出以N组合器消除预定相位差的相位组合。
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9.发明公开High-frequency power divider and combiner 失效Schaltung zum Aufteilen oderZusammenführenvon Hochfrequenzleistung。
公开(公告)号：EP0540286A1
公开(公告)日：1993-05-05
申请号：EP92309816.4
申请日：1992-10-27
申请人： JAPAN RADIO CO., LTD , NIPPON TELEGRAPH AND TELEPHONE CORPORATION , NTT MOBILE COMMUNICATIONS NETWORK INC.
发明人： Sakamoto, Hironori , Ito, Akira , Nojima, Toshio
摘要： In a power amplifying apparatus which has a high-frequency power divider and combiner and two to four parallel-operated power amplifiers, in which a change is made in the number of the parallel-operated power amplifiers so as to adjust output power, there are provided a power dividing circuit D₁ having a transmission line Wd₅₁ serving as an impedance transformer set in such a manner that the power loss is minimized by assigning an intermediate number 3 between 2 and 4 both of which indicate the number of divisions, and having four output terminals, and a power combining circuit S₁ having a transmission line Ws₅₁ serving as an impedance transformer set in such a manner that the power loss is minimized by assigning the intermediate number 3 indicative of the number of combinations, and having four input terminals.
摘要翻译： 在具有高频功率分配器和组合器的功率放大装置和两到四个并联操作的功率放大器中，其中并行操作的功率放大器的数量改变以便调节输出功率， 提供了具有用作阻抗变换器的传输线Wd psi <5>的功率分配电路D5，以使得通过分配2到4之间的中间数3来最小化功率损耗，二者都表示数字 并具有四个输出端子，以及具有用作阻抗变换器的传输线W s psi <5的功率组合电路S 5，其设置为通过分配中间数字3来指示功率损耗最小化 的组合数量，并具有四个输入端子。
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公开(公告)号：EP0539224A2
公开(公告)日：1993-04-28
申请号：EP92309741.4
申请日：1992-10-23
申请人： JAPAN RADIO CO., LTD , NIPPON TELEGRAPH AND TELEPHONE CORPORATION , NTT MOBILE COMMUNICATIONS NETWORK INC.
摘要： In a receiver comprising a receiver filter (12) with a frequency attenuation band and a pilot oscillator (25) for generating a pilot oscillation signal with a pilot frequency in the frequency attenuation band, a coupler (26) couples the pilot oscillation signal and a filtered receiver signal of the receiver filter into a coupled signal. A low noise amplifier (13) amplifies the coupled signal into an amplified signal which comprises an amplified receiver signal derived from the filtered receiver signal and an amplified pilot oscillation signal derived from the pilot oscillation siganl. A branching filter (27) branches the amplified signal into the amplified receiver signal and the amplified pilot oscillation signal. A pilot signal detector unit (28) detects the amplified pilot oscillation signal to produce a direct pilot signal. A failure monitoring unit (29) monitors the direct pilot signal to produce a fault signal when the direct pilot signal is found faulty.
摘要翻译： 在包括具有频率衰减频带的接收机滤波器（12）和用于在频率衰减频带中产生具有导频的导频振荡信号的导频振荡器（25）的接收机中，耦合器（26）将导频振荡信号和 将接收机滤波器的滤波后的接收机信号转换为耦合信号。 低噪声放大器（13）将耦合信号放大为放大信号，该放大信号包括从经滤波的接收机信号导出的放大的接收机信号和从导频振荡信号导出的放大的导频振荡信号。 分路滤波器（27）将放大的信号分支为放大的接收机信号和放大的导频振荡信号。 导频信号检测器单元（28）检测放大的导频振荡信号以产生直接导频信号。 当发现直接导频信号有故障时，故障监视单元（29）监视直接导频信号以产生故障信号。
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