公开(公告)号：EP4307138A1

公开(公告)日：2024-01-17

申请号：EP23184654.4

申请日：2023-07-11

申请人： NXP USA, Inc.

发明人： Mundarath, Jayakrishnan Cheriyath ,  Traylor, Kevin Bruce

IPC分类号： G06F17/14 ,  G06F9/38

摘要： A method for self-ordering Fast Fourier Transform for Single Instruction Multiple Data engines includes performing a butterfly operation on a first input vector and a second input vector to generate a first output vector and a second output vector, wherein the first input vector, the second input vector, the first output vector and the second output vector are each comprised of complex numbers, and a first order of the complex numbers of the first output vector is non-linear and a second order of the complex numbers of the second output vector is non-linear. A combination of complex numbers is reordered and exchanged between the first output vector and the second output vector to partially linearize the first order of the first output vector and to partially linearize the second order of the second output vector.

公开(公告)号：EP3859387A1

公开(公告)日：2021-08-04

申请号：EP21151328.8

申请日：2021-01-13

申请人： NXP USA, Inc.

发明人： Wu, Ryan Haoyun ,  Mundarath, Jayakrishnan Cheriyath ,  Lu, Sili ,  Brett, Maik

IPC分类号： G01S13/90 ,  G01S7/288

摘要： Embodiments are disclosed that for synthetic aperture radar (SAR) systems and methods that process radar image data to generate radar images using vector processor engines, such as single-instruction-multiple-data (SIMD) processor engines. The vector processor engines can be further augmented with accelerators that vectorize element selection thereby expediting memory accesses required for interpolation operations performed by the vector processor engines.