METHOD AND SYSTEM FOR AUTOMATIC COMPENSATION OF LINE DELAY IN A CLOCK DISTRIBUTION SYSTEM
    1.
    发明授权
    METHOD AND SYSTEM FOR AUTOMATIC COMPENSATION OF LINE DELAY IN A CLOCK DISTRIBUTION SYSTEM 失效
    方法及系统时钟分配系统自动LEAD延迟补偿

    公开(公告)号:EP0770237B1

    公开(公告)日:2002-03-06

    申请号:EP95924346.0

    申请日:1995-07-10

    申请人: Nokia Networks Oy

    发明人: RUUSKANEN, Markku

    IPC分类号: G06F1/10

    摘要: The invention relates to a method and system for automatic compensation of line delay in a clock distribution system which comprises a clock signal generator (1) which supplies a master clock signal through a clock path (2) to a number of decentralized clock signal buffers (P1...PN). According to the invention, the system further comprises a counter, or a similar device, which measures the propagation time of a measuring signal from the corresponding clock signal buffer to the end (B) of the line (3) and back.

    REDUNDANT SWITCHING ARRANGEMENT
    2.
    发明公开
    REDUNDANT SWITCHING ARRANGEMENT 有权
    冗余交换设备

    公开(公告)号:EP1068714A2

    公开(公告)日:2001-01-17

    申请号:EP99938026.4

    申请日:1999-03-05

    申请人: Nokia Networks Oy

    IPC分类号: H04M3/22 H04Q1/24 H04B1/74

    CPC分类号: H04M3/22

    摘要: The invention relates to a redundant switching arrangement using a first and second switching network (SWF_A, SWF_B) or other switching element. The switching elements are used to carry out switching operations in the same way, so that one of the switching elements serves as an active switching element whose switching operations are utilised, while the other switching element serves as a passive switching element backing up the active switching element. To ensure that any faults occurring in the switching elements in such a redundant switching arrangement are detected as quickly as possible, their operation is monitored by comparing the data of the corresponding output channels of the first and second switching elements, and if such a comparison shows that the data contained in any of the corresponding output channels are not identical, an internal test is carried out for at least one of the switching elements to verify the data of the output channel involved. The internal compare test(s) is/are used as a basis for selecting the switching element to continue to serve as the active switching element.