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公开(公告)号：EP0412657B1
公开(公告)日：1995-04-19
申请号：EP90307596.8
申请日：1990-07-11
CPC分类号： G06T11/006 , G06T1/20 , G06T2211/428
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公开(公告)号：EP0412657A2
公开(公告)日：1991-02-13
申请号：EP90307596.8
申请日：1990-07-11
CPC分类号： G06T11/006 , G06T1/20 , G06T2211/428
摘要： An imaging apparatus and method acquires image data from a non-invasive examination of a subject. The data is transferred among various agents (20, 30, 40, 50, 60. 70) on a data bus (B). A data acquisition agent (20) receives the image data from the non-invasive examination and generates subsequent agent locations and transmits the subsequent agent locations and the packets of image data along the data bus. Various image processing agents (30, 40, 50) each receive packets of data transmitted with that agent's location and performs imaging and processing operations on the data packets generating another agent location and thereafter transmitting the other agent location and process data packets along the data bus. A display agent (60) receives the processed image data packets from one of the image processing agents via the data bus, stores the processed image data packets and communicates the process image data to a man-readable image display (68).
摘要翻译： 成像装置和方法从对象的非侵入性检查获取图像数据。 在数据总线（B）上的数据在各种代理（20,30,40,50,60,70）之间传送。 数据采集代理（20）从非侵入性检查接收图像数据，并产生后续代理位置，并沿数据总线发送后续代理位置和图像数据分组。 各种图像处理代理（30,40,50）各自接收利用该代理的位置发送的数据包，并对生成另一代理位置的数据分组执行成像和处理操作，然后沿数据总线发送其他代理位置和处理数据分组 。 显示代理（60）经由数据总线从图像处理代理之一接收经处理的图像数据分组，存储经处理的图像数据分组，并将处理图像数据传送到人类可读图像显示（68）。
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公开(公告)号：EP0370792B1
公开(公告)日：1996-01-24
申请号：EP89312126.9
申请日：1989-11-22
发明人： Brunnett, Carl J. , Gocal, Beverly M. , Vrettos, Chris J. , Hyland, Paul J. , Kerber, Michael M. , Pexa, James M. , Sidoti, John
IPC分类号： G06F15/80
CPC分类号： G06F15/8015 , G06T1/20
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公开(公告)号：EP0370792A3
公开(公告)日：1992-03-04
申请号：EP89312126.9
申请日：1989-11-22
发明人： Brunnett, Carl J. , Gocal, Beverly M. , Vrettos, Chris J. , Hyland, Paul J. , Kerber, Michael M. , Pexa, James M. , Sidoti, John
CPC分类号： G06F15/8015 , G06T1/20
摘要： An array processor wherein data coming out of an internal data memory device (22) is fed into a register file (24), and on the same clock cycle, three data results are coming out of an arithmetic unit (26, 28, 30) and feed back into the register file. Therefore, on a single clock cycle, five separate pieces of data are going into the register file. In the same clock cycle, other data coming out of the outputs of the register file (24) feed data into two separate floating arithmetic adders (26, 28) and one floating arithmetic multiplier (30). The arrangement allows a constant flow of data to be supplied to the arithmetic unit thereby using the arithmetic unit to its maximum functioning ability.
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公开(公告)号：EP0412657A3
公开(公告)日：1991-05-29
申请号：EP90307596.8
申请日：1990-07-11
CPC分类号： G06T11/006 , G06T1/20 , G06T2211/428
摘要： An imaging apparatus and method acquires image data from a non-invasive examination of a subject. The data is transferred among various agents (20, 30, 40, 50, 60. 70) on a data bus (B). A data acquisition agent (20) receives the image data from the non-invasive examination and generates subsequent agent locations and transmits the subsequent agent locations and the packets of image data along the data bus. Various image processing agents (30, 40, 50) each receive packets of data transmitted with that agent's location and performs imaging and processing operations on the data packets generating another agent location and thereafter transmitting the other agent location and process data packets along the data bus. A display agent (60) receives the processed image data packets from one of the image processing agents via the data bus, stores the processed image data packets and communicates the process image data to a man-readable image display (68).
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6.发明公开
公开(公告)号：EP0370792A2
公开(公告)日：1990-05-30
申请号：EP89312126.9
申请日：1989-11-22
发明人： Brunnett, Carl J. , Gocal, Beverly M. , Vrettos, Chris J. , Hyland, Paul J. , Kerber, Michael M. , Pexa, James M. , Sidoti, John
CPC分类号： G06F15/8015 , G06T1/20
摘要： An array processor wherein data coming out of an internal data memory device (22) is fed into a register file (24), and on the same clock cycle, three data results are coming out of an arithmetic unit (26, 28, 30) and feed back into the register file. Therefore, on a single clock cycle, five separate pieces of data are going into the register file. In the same clock cycle, other data coming out of the outputs of the register file (24) feed data into two separate floating arithmetic adders (26, 28) and one floating arithmetic multiplier (30). The arrangement allows a constant flow of data to be supplied to the arithmetic unit thereby using the arithmetic unit to its maximum functioning ability.
摘要翻译： 一种阵列处理器，其中从内部数据存储装置（22）出来的数据被馈送到寄存器文件（24）中，并且在相同的时钟周期中，从运算单元（26,28,30）发出三个数据结果， 并反馈到寄存器文件。 因此，在单个时钟周期中，五个单独的数据将进入寄存器文件。 在相同的时钟周期中，从寄存器文件（24）输出的其他数据将数据馈送到两个分离的浮动算术加法器（26,28）和一个浮动算术乘法器（30）。 该布置允许将数据的恒定流量提供给算术单元，从而使用算术单元达到其最大功能能力。
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