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公开(公告)号：EP0417272A1
公开(公告)日：1991-03-20
申请号：EP90908307.0
申请日：1990-05-07
CPC分类号： H04L25/4908 , H04L25/497
摘要： Dans un récepteur de signaux à modulation de phase tétravalente, sont présents un récepteur de signaux à modulation de phase tétravalente ayant deux sortes d'équilibreurs, ceux-ci étant différents dans chacune des phases sinus et cosinus, ainsi qu'un équilibreur extracteur d'un signal horloge.
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公开(公告)号：EP0417272B1
公开(公告)日：1997-08-27
申请号：EP90908307.3
申请日：1990-05-07
IPC分类号： H04L25/49 , H04L25/497
CPC分类号： H04L25/4908 , H04L25/497
摘要： In a receiver of quadraphase modulation signals, a receiver of quadraphase modulation signals which is provided with two kinds of equalizers being different in each sine and cosine phases, together with and equalizer extracting a clock signal.
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公开(公告)号：EP1665263A1
公开(公告)日：2006-06-07
申请号：EP04769387.4
申请日：2004-09-13
CPC分类号： H04L25/03044 , H04L2025/03477 , H04L2025/03611 , H04L2025/03681
摘要： A device (200) with an adaptive equalizer (210) includes an adaption scheme performed in the synchronous domain. The equalizer coefficient update scheme is based on a correlation of an error sequence (delta k) derived from the equalized sequence transposed to the synchronous domain (Ek) and a synchronous and delayed version (Jk) of a vector of the equalizer tap values (Vn). The result of the correlation is further passed through an arrangement of integrators (226) and a temporal interpolator (228). The vector of equalizer tap values is converted into the synchronous domain by means of a bank of sampling rate converters (230) of which the overall implementation (300) can be simplified.
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