Vertical deflection circuit
    1.
    发明公开
    Vertical deflection circuit 失效
    Vertikalablenkschaltung。

    公开(公告)号:EP0424982A2

    公开(公告)日:1991-05-02

    申请号:EP90122496.4

    申请日:1987-04-09

    IPC分类号: H04N9/29 H04N3/16

    摘要: A vertical deflection amplifier (20) of a video display apparatus includes first (Q1) and second (Q2) transistor amplifier output stages arranged in a totem-­pole, push-pull configuration. A vertical-deflection winding (L V ) is coupled to the output stages at a deflection amplifier output terminal (22). An S-capacitor (C1) is coupled to the deflection winding (L V ) at a second terminal (21) remote from the output terminal (22). A source (23) of deflection rate signals is coupled to the deflection amplifier (20) for generating a deflection current (i v ) in the deflection winding (L V ). A base current generating circuit (40) is coupled to one (Q1) of the transistor amplifier output stages for providing base current (i1) thereto. The S-capacitor voltage (V1) is applied to the base current generating circuit (40) for enabling conduction of base current (i1) in the one amplifier output stage (Q1). When the video display apparatus is first turned on, the initially discharged S-capacitor (C1) is slowly charged from a DC voltage supply (+30V) to delay generation of vertical def lection past completion of picture tube degaussing. A DC power supply (16) upon energization in response to a switch (15) produces a DC level (+DC2) sufficient for operating the deflection amplifier prior to the conclusion of degaussing.

    摘要翻译: 视频显示装置的垂直偏转放大器(20)包括以图腾柱推挽配置布置的第一(Q1)和第二(Q2)晶体管放大器输出级。 垂直偏转绕组(LV)在偏转放大器输出端(22)处耦合到输出级。 S电容器(C1)在远离输出端子(22)的第二端子(21)处耦合到偏转绕组(LV)。 偏转率信号的源极(23)耦合到偏转放大器(20),用于在偏转绕组(LV)中产生偏转电流(iv)。 基极电流产生电路(40)耦合到晶体管放大器输出级的一个(Q1),以向其提供基极电流(i1)。 将S电容电压(V1)施加到基极电流发生电路(40),以使得能够导通一个放大器输出级(Q1)中的基极电流(i1)。 当视频显示装置首次打开时,初始放电的S电容器(C1)从直流电压源(+ 30V)缓慢充电,以延迟垂直偏转的产生,直到显像管消磁完成。 响应于开关(15)通电时的DC电源(16)产生足以在消磁结束之前操作偏转放大器的DC电平(+ DC2)。

    Vertical deflection circuit
    3.
    发明公开
    Vertical deflection circuit 失效
    垂直偏转电路

    公开(公告)号:EP0424982A3

    公开(公告)日:1992-05-13

    申请号:EP90122496.4

    申请日:1987-04-09

    IPC分类号: H04N9/29 H04N3/16

    摘要: A vertical deflection amplifier (20) of a video display apparatus includes first (Q1) and second (Q2) transistor amplifier output stages arranged in a totem-­pole, push-pull configuration. A vertical-deflection winding (L V ) is coupled to the output stages at a deflection amplifier output terminal (22). An S-capacitor (C1) is coupled to the deflection winding (L V ) at a second terminal (21) remote from the output terminal (22). A source (23) of deflection rate signals is coupled to the deflection amplifier (20) for generating a deflection current (i v ) in the deflection winding (L V ). A base current generating circuit (40) is coupled to one (Q1) of the transistor amplifier output stages for providing base current (i1) thereto. The S-capacitor voltage (V1) is applied to the base current generating circuit (40) for enabling conduction of base current (i1) in the one amplifier output stage (Q1). When the video display apparatus is first turned on, the initially discharged S-capacitor (C1) is slowly charged from a DC voltage supply (+30V) to delay generation of vertical def lection past completion of picture tube degaussing. A DC power supply (16) upon energization in response to a switch (15) produces a DC level (+DC2) sufficient for operating the deflection amplifier prior to the conclusion of degaussing.