Apparatus and method for implementing a bank interlock scheme and related test mode for multi-bank memory devices
    1.
    发明公开
    Apparatus and method for implementing a bank interlock scheme and related test mode for multi-bank memory devices 审中-公开
    Verfahren und Vorrichtung zurPrüfungvon verriegelten Multi-Bank-Speichern

    公开(公告)号:EP0907184A2

    公开(公告)日:1999-04-07

    申请号:EP98115819.9

    申请日:1998-08-21

    IPC分类号: G11C29/00

    CPC分类号: G11C29/28

    摘要: Testing of a multibank memory device having a plurality of memory banks which includes activating two or more of the plurality of memory banks for participation in the test; selecting at least one common memory address corresponding to a memory cell within each activated bank; simultaneously writing test data into the selected memory cell of each activated bank;
    simultaneously reading the test data previously written into the selected memory cell of each activated bank; and comparing the test data read from each activated bank with the test data from each other activated bank and if a match is determined to exist, then indicating a pass condition, else indicating a fail condition.

    摘要翻译: 具有多个存储体的多存储器件的测试包括激活多个存储器组中的两个或更多个参与测试; 选择对应于每个激活的存储体内的存储器单元的至少一个公共存储器地址; 同时将测试数据写入每个激活的存储体的选定存储单元; 同时读取先前写入每个激活银行的选定存储单元的测试数据; 并且将从每个激活的存储体读取的测试数据与来自彼此激活的存储体的测试数据进行比较,并且如果确定存在匹配,则指示通过条件,否则指示失败状况。