摘要:
A multi level charge pump circuit configured to be associated with at least two power supplies Vdd1 and Vdd2, and which provides four levels of positive andn negative voltage. The circuit includes first and second fly capacitors (32, 33) and first and second tank capacitor (31,34). PMOS transistors 101, 102, 111, 112 and 125 as NMOS transistors 122, 123, 124, 121 and 126 allow the generation of two high voltage levels and two low voltage levels for the charge pump, those low voltage levels being derived from a charging of a series of the two fly capacitors. The circuit is particularly useful for embodying an audio device within a platform which does not incorporate any dedicated SMPS circuit.