MEMORY SYSTEMS INCLUDING MEMORY CONTROLLERS THAT USE STATUS INPUT PINS TO CHECK MEMORY OPERATION STATUSES OF MEMORY DEVICES

    公开(公告)号:EP4187537A1

    公开(公告)日:2023-05-31

    申请号:EP22207415.5

    申请日:2022-11-15

    IPC分类号: G11C7/10 G11C16/20

    摘要: A memory system may include a plurality of first memory devices; and a memory controller that may include a first chip enable, CE, pin configured to output a first CE signal that enables selectively any one of the first memory devices and a first status input pin configured to receive a first output signal indicating a memory operation status of an enabled first memory device from among the first memory devices in a first memory operation status checking period. In the first memory operation status checking period, the first output signal has one of a first level to indicate a first status of the memory operation status of the enabled first memory device, a second level to indicate a second status of the memory operation status of the enabled first memory device, or a third level to indicate a disabled status of the first memory devices.