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    Array substrate
    2.
    发明公开
    Array substrate 有权
    阵列基板

    公开(公告)号：EP2648035A3

    公开(公告)日：2014-02-12

    申请号：EP13173729.8

    申请日：2009-05-29

    申请人： Samsung Electronics Co., Ltd.

    发明人： Woo, Hwa-Sung ,  Jang, Joo-Nyung ,  Shin, Cheol ,  Um, Yeoon-Sung ,  Song, Mi-Jeong

    IPC分类号： G02F1/1343 ,  G02F1/1362 ,  G02F1/139

    CPC分类号： G02F1/136286 ,  G02F1/134363 ,  G02F1/136213 ,  G02F1/13624 ,  G02F1/1393 ,  G09G3/3614 ,  G09G3/3659 ,  G09G2300/0426 ,  G09G2300/0434 ,  G09G2300/0823 ,  G09G2300/0852

    摘要： An array substrate (400) comprising a first pixel electrode (491a) overlapped with first and second power lines (431, 435) extended along a gate line (421), the first and second power lines (431, 435) being adapted to receive voltages having different polarities, respectively, the first pixel electrode (491a) being electrically connected to a first data line (471a; Dj); a second pixel electrode (491b) overlapped with the first and second power lines (431, 435), the second pixel electrode (491b; 591b) being electrically connected to a second data line (471b; Dj+1) being adapted to receive a voltage having an opposite polarity to a voltage applied to the first data line (471a; Dj); a first common electrode (491c) overlapping with the first and second power lines (431; 435), the first common electrode (491c) being electrically connected to the first power line (431); and a second common electrode (491d) overlapping with the first and second power lines (431; 435), the second common electrode (491d) being electrically connected to the second power line (435); wherein a capacitance (Cst) of the first common electrode (491c) with the second power line (435) is substantially the same as the sum of the capacitances of a capacitor (Csg) formed by overlapping the first pixel electrode (491a) and the first power line (431) and a capacitor (Csa) formed by overlapping the first pixel electrode (491a) and the second power line (435), and a capacitance (Cst) of the second common electrode (491d) with the first power line (431) is substantially the same as the sum of the capacitances of a capacitor (Csg) formed by overlapping the second pixel electrode (491b) and the first power line (431) and a capacitor (Csa) formed by overlapping the second pixel electrode(491b) and the second power line (435).

    Array substrate
    3.
    发明公开
    Array substrate 有权
    Arraysubstrat

    公开(公告)号：EP2648035A2

    公开(公告)日：2013-10-09

    申请号：EP13173729.8

    申请日：2009-05-29

    申请人： Samsung Electronics Co., Ltd.

    发明人： Woo, Hwa-Sung ,  Jang, Joo-Nyung ,  Shin, Cheol ,  Um, Yeoon-Sung ,  Song, Mi-Jeong

    IPC分类号： G02F1/1343 ,  G02F1/1362 ,  G02F1/139

    CPC分类号： G02F1/136286 ,  G02F1/134363 ,  G02F1/136213 ,  G02F1/13624 ,  G02F1/1393 ,  G09G3/3614 ,  G09G3/3659 ,  G09G2300/0426 ,  G09G2300/0434 ,  G09G2300/0823 ,  G09G2300/0852

    摘要： An array substrate (400) comprising a first pixel electrode (491a) overlapped with first and second power lines (431, 435) extended along a gate line (421), the first and second power lines (431, 435) being adapted to receive voltages having different polarities, respectively, the first pixel electrode (491a) being electrically connected to a first data line (471a; Dj); a second pixel electrode (491b) overlapped with the first and second power lines (431, 435), the second pixel electrode (491b; 591b) being electrically connected to a second data line (471b; Dj+1) being adapted to receive a voltage having an opposite polarity to a voltage applied to the first data line (471a; Dj); a first common electrode (491c) overlapping with the first and second power lines (431; 435), the first common electrode (491c) being electrically connected to the first power line (431); and a second common electrode (491d) overlapping with the first and second power lines (431; 435), the second common electrode (491d) being electrically connected to the second power line (435); wherein a capacitance (Cst) of the first common electrode (491c) with the second power line (435) is substantially the same as the sum of the capacitances of a capacitor (Csg) formed by overlapping the first pixel electrode (491a) and the first power line (431) and a capacitor (Csa) formed by overlapping the first pixel electrode (491a) and the second power line (435), and a capacitance (Cst) of the second common electrode (491d) with the first power line (431) is substantially the same as the sum of the capacitances of a capacitor (Csg) formed by overlapping the second pixel electrode (491b) and the first power line (431) and a capacitor (Csa) formed by overlapping the second pixel electrode(491b) and the second power line (435).

    摘要翻译： 阵列基板（400）包括与沿栅极线（421）延伸的第一和第二电力线（431,435）重叠的第一像素电极（491a），第一和第二电力线（431,435）适于接收 第一像素电极（491a）分别与第一数据线（471a; Dj）电连接，具有不同极性的电压; 与第一和第二电源线（431,435）重叠的第二像素电极（491b），与第二数据线（471b; Dj + 1）电连接的第二像素电极（491b; 591b）适于接收 电压具有与施加到第一数据线（471a; Dj）的电压相反的极性; 与第一和第二电源线（431; 435）重叠的第一公共电极（491c），第一公共电极（491c）电连接到第一电力线（431）; 以及与所述第一和第二电力线（431; 435）重叠的第二公共电极（491d），所述第二公共电极（491d）电连接到所述第二电力线（435）; 其特征在于，所述第一公共电极（491c）与所述第二电力线（435）的电容（Cst）与通过与所述第一像素电极（491a）重叠而形成的电容器（Csg）的电容的总和大致相同， 第一电力线（431）和通过与第一像素电极（491a）和第二电力线（435）重叠而形成的电容器（Csa）和第二公共电极（491d）的电容（Cst）与第一电力线 （431）与通过与第二像素电极（491b）和第一电力线（431）重叠形成的电容器（Csg）和与第二像素电极重叠形成的电容器（Csa）的电容之和基本相同 （491b）和第二电力线（435）。