公开(公告)号：EP4361822A1

公开(公告)日：2024-05-01

申请号：EP23204795.1

申请日：2023-10-20

申请人： Samsung Electronics Co., Ltd.

发明人： YOU, Daehun ,  KIM, Sungwook ,  LEE, Byungyo

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F2212/720320130101 ,  G06F2212/720120130101 ,  G06F2212/720220130101

摘要： Provided is a storage device including a memory, a plurality of non-volatile memories of which an access speed is slower than that of the memory, and a controller configured to control a first data input/output operation with a host device using the plurality of non-volatile memories, based on a first map table stored in the memory, in a first mode, and control a second data input/output operation with the host device using the memory, based on a second map table stored in the memory, in a second mode.

公开(公告)号：EP3992803A3

公开(公告)日：2022-05-11

申请号：EP21185065.6

申请日：2021-07-12

申请人： Samsung Electronics Co., Ltd.

发明人： LIM, Jaehwan ,  KIM, Sung-Wook ,  KIM, Jae Eun ,  YOU, Daehun ,  JUN, Walter

IPC分类号： G06F13/16 ,  G11C7/04 ,  G11C16/10 ,  G11C16/32

摘要： A storage device includes a nonvolatile memory device and a controller that accesses the nonvolatile memory device based on a request of an host device, receives a first clock signal from the host device, generates a second clock signal through frequency multiplication of the first clock signal, and communicates with the host device based on the second clock signal. The controller adjusts a multiplication ratio for the frequency multiplication of the first clock signal and a frequency multiplication ratio of a clock multiplier of the host device, the clock multiplier generating said first clock signal.

公开(公告)号：EP3992803A2

公开(公告)日：2022-05-04

申请号：EP21185065.6

申请日：2021-07-12

申请人： Samsung Electronics Co., Ltd.

发明人： LIM, Jaehwan ,  KIM, Sung-Wook ,  KIM, Jae Eun ,  YOU, Daehun ,  JUN, Walter

IPC分类号： G06F13/16 ,  G11C7/04 ,  G11C16/10 ,  G11C16/32

摘要： A storage device includes a nonvolatile memory device and a controller that accesses the nonvolatile memory device based on a request of an host device, receives a first clock signal from the host device, generates a second clock signal through frequency multiplication of the first clock signal, and communicates with the host device based on the second clock signal. The controller adjusts a multiplication ratio for the frequency multiplication of the first clock signal and a frequency multiplication ratio of a clock multiplier of the host device, the clock multiplier generating said first clock signal.

公开(公告)号：EP3940505A1

公开(公告)日：2022-01-19

申请号：EP21167398.3

申请日：2021-04-08

申请人： Samsung Electronics Co., Ltd.

发明人： KIM, Sung-Wook ,  KIM, So-Geum ,  YOU, Daehun ,  LIM, Jaehwan

IPC分类号： G06F1/26 ,  G06F1/20 ,  G06F3/06

摘要： An electronic device includes: a power supply to supply a first power and a second power; a first solid state drive (SSD) backplane and a second SSD backplane to receive the first power from the power supply, each of the first solid state drive (SSD) backplane and the second SSD backplane including two or more SSDs; and a baseboard to receive the second power from the power supply, to independently power on and power off the first SSD backplane and the second SSD backplane, and to access the SSDs of an SSD backplane that is in a power-on state from among the first SSD backplane and the second SSD backplane. In response to an increase in temperature of an SSD backplane that is in a power-off state, at least one SSD of the SSD backplane that is in the power-off state may be powered on.