DIGITAL PHASE LOCKED LOOP DEVICE AND METHOD IN WIRELESS COMMUNICATION SYSTEM
    2.
    发明公开
    DIGITAL PHASE LOCKED LOOP DEVICE AND METHOD IN WIRELESS COMMUNICATION SYSTEM 有权
    数字设备和方法,一个无线通信系统的锁相环

    公开(公告)号:EP2608413A2

    公开(公告)日:2013-06-26

    申请号:EP11818426.6

    申请日:2011-08-19

    IPC分类号: H03L7/089

    摘要: A digital Phase Locked Loop (PLL) in a wireless communication system is provided. The PLL includes a Digitally Controlled Oscillator (DCO), a divider, a Phase Frequency Detector (PFD), a Time to Digital Converter (TDC), a delay comparator, and a level scaler. The DCO generates a frequency signal depending on an input Digital Tuning Word (DTW). The divider divides the frequency signal at an integer ratio. The PFD generates a signal representing a phase difference between a divided frequency signal and a reference signal. The TDC measures a time interval of the phase difference using the signal representing the phase difference. The delay comparator calculates a time interval in the case where rising edges coincide from values measured by the TDC. The level scaler generates a DTW that operates the DCO using a digital code representing the time interval.