METHOD AND APPARATUS FOR IMPROVED CODE AUTHENTICATION BETWEEN SOCS AND RE-WRITABLE MEMORY

    公开(公告)号:EP3822838A1

    公开(公告)日:2021-05-19

    申请号:EP20166401.8

    申请日:2020-03-27

    IPC分类号: G06F21/79 G06F21/57

    摘要: The invention discloses a method and an apparatus for improving code authentication between a SoC and a FLASH memory, whereas a FLASH memory size is bigger than an internal memory size of the SoC. The objective to provide a method that makes it more difficult for attacker to inject code and data exchanged between a non-volatile, electrically erasable and re-writable memory and the SoC, which uses the XIP mode will be solved by the following steps:
    - performing a full initial authentication scan of a FLASH image once after a cold boot of the system, and
    - selecting a set of C = 2 n (pseudo-)randomly distributed addresses out of the full FLASH memory size of F = 2 m with n and m are natural numbers and n m, whereas
    - during the initial scan the read content of the FLASH image according to the selected addresses of the set C is concurrently stored as a reference value in an internal RAM of the SoC, whereas
    - a means detects if an address out of set C is read during a cache line fetch and whereas its newly read value is compared against the stored reference value of it, indicating that an attack has occurred if these two values do not match, otherwise no attack has occurred.

    SINGLE COMMUNICATION INTERFACE AND A METHOD WITH INTERNAL/EXTERNAL ADDRESSING MODE

    公开(公告)号:EP3660692A1

    公开(公告)日:2020-06-03

    申请号:EP18208636.3

    申请日:2018-11-27

    IPC分类号: G06F13/42

    摘要: The invention discloses a single communication interface between a master device and at least one slave device and a method with internal/external addressing mode using the single communication interface. The object to provide a leaner communication interface between a master and slave device which is more universal and independent from internal software changes will be solved by a single communication interface between a master device and at least one slave device, whereas the master device comprises a master interface and the slave device comprises a slave interface and a slave bus-system, whereas the slave interface is directly connected to the slave bus-system, wherein the master interface and the slave interface communicate on a packet based protocol by an internal and external addressing mode inside the slave interface, whereas the addressing mode, data direction transfer and data address location are coded by the packet based protocol inside a first 32-bit word of each transmission between the master device and slave device over the single communication interface.