公开(公告)号：EP2110856A1

公开(公告)日：2009-10-21

申请号：EP08710726.4

申请日：2008-01-28

申请人： Sony Corporation ,  Riken

发明人： NOMOTO, Kazumasa ,  HIRAI, Nobukazu ,  YASUDA, Ryoichi ,  YAGI, Iwao ,  MINARI, Takeo ,  TSUKAGOSHI, Kazuhito ,  AOYAGI, Yoshinobu

IPC分类号： H01L29/786 ,  H01L21/336 ,  H01L51/05

CPC分类号： H01L51/001 ,  H01L51/0516 ,  H01L51/0529 ,  H01L51/0545

摘要： The present invention provides a method for making a thin film semiconductor device having a bottom-gate, bottom-contact-type thin film transistor structure finer in size with satisfactory characteristics, in which the interface between a gate insulating film and a thin film semiconductor layer can be maintained at satisfactory conditions without being affected by formation of source/drain electrodes. A first gate insulating film (7-1) covering a gate electrode (5) on a substrate (3) is formed, and a pair of source/drain electrodes (9) is formed on the first gate insulating film (7-1). Subsequently, a second gate insulating film (7-2) is selectively formed only on the first gate insulating film (7-2) exposed from the source/drain electrodes (9). Next, a thin film semiconductor layer (11) continuously covering from the source/drain electrodes (9) to the first gate insulating film (7-1) through the second gate insulating film (7-2) is formed while making contact with the source/drain electrodes (9). A method for making a thin film semiconductor device (1) is characterized as such.

摘要翻译： 本发明提供一种制造薄膜半导体器件的方法，该薄膜半导体器件具有尺寸较小且具有令人满意的特性的底栅，底接触型薄膜晶体管结构，其中栅极绝缘膜和薄膜半导体层 可以在令人满意的条件下保持不受源/漏电极形成的影响。 形成覆盖基板（3）上的栅极（5）的第一栅极绝缘膜（7-1），在第一栅极绝缘膜（7-1）上形成有一对源极/漏极（9） 。 随后，仅在从源极/漏极（9）露出的第一栅极绝缘膜（7-2）上选择性地形成第二栅极绝缘膜（7-2）。 接下来，形成通过第二栅极绝缘膜（7-2）从源极/漏极（9）到第一栅极绝缘膜（7-1）连续覆盖的薄膜半导体层（11），同时与 源极/漏极（9）。 制造薄膜半导体器件（1）的方法的特征如下。