公开(公告)号：EP3353646B1

公开(公告)日：2019-10-30

申请号：EP16775609.7

申请日：2016-09-23

申请人： Thales Dis France SA

发明人： LOUBET MOUNDI, Philippe ,  COULON, Jean-Roch ,  PEREZ CHAMORRO, Jorge Ernesto

IPC分类号： G06F7/58 ,  H03K3/84 ,  G06F1/04

公开(公告)号：EP4002165A1

公开(公告)日：2022-05-25

申请号：EP20306401.9

申请日：2020-11-18

申请人： Thales DIS France SA

发明人： COULON, Jean-Roch ,  SINTZOFF, André ,  CHAMSKI, Zbigniew

IPC分类号： G06F21/14 ,  G06F21/55

摘要： The present invention relates to an execution system having at least a central processing unit (CPU), a system memory (SM) storing a genuine program (cGC) having ciphered instructions (CI) stored at determined addresses and a secure agent component (SAC) dedicated to the protection of the execution of the genuine program (cGC), said secure agent component (SAC) being inserted between the system memory (SM) and the central processing unit (CPU) and fetching the ciphered instructions (CI) occurring between system memory (SM) and the central processing unit (CPU), said secure agent component (SAC) comprising at least a signature register (SR) storing an instruction flow signature depending on previously executed instructions and a ciphering/deciphering module. Each fetched ciphered instruction (CI) is deciphered by executing a function depending on the ciphered instruction (CI) and on the instruction flow signature as stored in the signature register (SR) before sending the de-ciphered instruction (DI) to the central processing unit (CPU). A new instruction flow signature is determined depending on the instruction and on the instruction flow signature of the previous instruction in the instruction flow of the genuine program (cGC) before storing this new instruction flow signature in the signature register (SR).

公开(公告)号：EP4002170A1

公开(公告)日：2022-05-25

申请号：EP20306400.1

申请日：2020-11-18

申请人： Thales DIS France SA

发明人： COULON, Jean-Roch ,  SINTZOFF, André

IPC分类号： G06F21/52

摘要： The present invention relates to an execution system having at least a central processing unit (CPU), system memory (SM) and a secure agent component (SAC) monitoring memory access instructions occurring between the central processing unit (CPU) and system memory (SM), said secure agent component (SAC) comprising a colour memory (CM) storing a colour tag for each memory address of the system memory (SM):
said secure agent component (SAC) being such that, for store instruction at a destination address, it copies the colour tag stored at the instruction address in the colour memory to the destination address in the colour memory (CM) while storing data,
said secure agent component (SAC) being further such that, for load instruction at a retrieval address, it compares the colour tag stored at the retrieval address and the colour tag at the load instruction in the colour memory (CM),
dysfunction is detected if colour tags are different.