公开(公告)号：EP3442239A1

公开(公告)日：2019-02-13

申请号：EP17779206.6

申请日：2017-04-06

申请人： Thine Electronics, Inc.

发明人： MIURA, Satoshi ,  MURAKAMI, Yoshimichi ,  YAMAMOTO, Shuhei

IPC分类号： H04N21/436

摘要： The present invention relates to a video signal transmission device and the like that can support a variety of system specifications. The device includes a packer unit, an encoder unit, and a serializer. The packer unit generates, from a video signal of one or more pixels, a plurality of block signals having a packet configuration of size corresponding to the number of pixels and the number of tone bits of a color signal constituting a video signal. At this time, a control signal including a pulse having a width corresponding to the number of pixels and the number of tone bits is also generated. The encoder unit applies encoding processing having encoding efficiencies that are different between a first period and a second period of a control signal that are distinguished depending on existence or non-existence of a pulse to the block signals.

公开(公告)号：EP2408111B1

公开(公告)日：2020-10-07

申请号：EP10750685.9

申请日：2010-02-25

申请人： Thine Electronics, Inc.

发明人： SUZUKI, Hajime ,  MIURA, Satoshi

IPC分类号： H03C3/09 ,  G06F1/24

公开(公告)号：EP3133823B1

公开(公告)日：2019-03-06

申请号：EP15779958.6

申请日：2015-03-11

申请人： Thine Electronics, Inc.

发明人： TAKEUCHI, Ryo ,  MIURA, Satoshi

IPC分类号： H04N21/436 ,  H04L7/08 ,  G09G5/00 ,  H04N21/434 ,  H04N21/236 ,  G06F3/14

公开(公告)号：EP2211524B1

公开(公告)日：2012-07-11

申请号：EP09824721.6

申请日：2009-10-27

申请人： Thine Electronics, Inc.

发明人： AKITA Hironobu ,  ISHIZONE, Yohei ,  OZAWA, Seiichi ,  MIURA, Satoshi

IPC分类号： H04L7/10

CPC分类号： H04L7/10 ,  G09G5/008 ,  H03L7/095 ,  H04L7/033 ,  H04L7/046

摘要： Provided are a transmitter apparatus, a receiver apparatus and a communication system wherein a simple structure is used to positively confirm a bit rate as changed.  In a communication system (1), a transmitter apparatus (2) changes the bit rate of a serial data signal (S
data ) such that the bit rate of the serial data signal (S
data ) exhibits a fixed value for a period that is a fixed times of a clock cycle.  The transmitter apparatus (2) then transmits the serial data signal (S
data ) to a receiver apparatus (3).  In the receiver apparatus (3) having received the serial data signal (S
data ), it is determined whether the bit rate of the serial data signal (S
data ) exhibits the fixed value for the period that is a fixed times of the clock cycle.  If so determined, the receiver apparatus (3) receives a training data (T
data ) from the transmitter apparatus (2) and then enters a process of confirming the bit rate as changed.

摘要翻译： 提供了一种发送器设备，接收器设备和通信系统，其中使用简单的结构来肯定确认已改变的比特率。 在通信系统（1）中，发送装置（2）改变串行数据信号（S data）的比特率，使得串行数据信号（S data）的比特率在 一个时钟周期的固定时间。 发送器设备（2）然后将串行数据信号（S数据）发送到接收器设备（3）。 在接收到串行数据信号（S data）的接收器装置（3）中，确定串行数据信号（S data）的比特率是否在时钟周期的固定时间的周期内呈现固定值 。 如果这样确定，接收机设备（3）从发射机设备（2）接收训练数据（T data），然后进入确认比特率被改变的处理。

公开(公告)号：EP3133823A1

公开(公告)日：2017-02-22

申请号：EP15779958.6

申请日：2015-03-11

申请人： Thine Electronics, Inc.

发明人： TAKEUCHI, Ryo ,  MIURA, Satoshi

IPC分类号： H04N21/436 ,  H04L7/08

CPC分类号： H04L7/08 ,  G09G5/006 ,  G09G5/18 ,  G09G2340/02 ,  G09G2370/04 ,  G09G2370/10 ,  H04N5/04 ,  H04N21/23602 ,  H04N21/4342 ,  H04N21/436

摘要： A transmission/reception system 1 includes a transmission device 10 configured to transmit image data and a reception device 20 configured to receive the image data transmitted from the transmission device 10. The transmission device 10 includes a serializer 11, an encoding unit 12, a data buffering unit 13, a data selection unit 14, a counter 15, and a synchronization signal generation unit 16. The data buffering unit 13 buffers data every n bits in synchronization with the clock. The data selection unit 14 outputs m-bit data selected from the data buffered by the data buffering unit 13 on the basis of a count value from the counter 15.

摘要翻译： 发送/接收系统1包括被配置为发送图像数据的发送设备10和被配置为接收从发送设备10发送的图像数据的接收设备20.发送设备10包括串行器11，编码单元12，数据 缓冲单元13，数据选择单元14，计数器15和同步信号生成单元16.数据缓冲单元13与时钟同步地每n位缓冲数据。 数据选择单元14基于来自计数器15的计数值输出从数据缓冲单元13缓冲的数据中选择的m位数据。

公开(公告)号：EP2211524A1

公开(公告)日：2010-07-28

申请号：EP09824721.6

申请日：2009-10-27

申请人： Thine Electronics, Inc.

发明人： AKITA Hironobu ,  ISHIZONE, Yohei ,  OZAWA, Seiichi ,  MIURA, Satoshi

IPC分类号： H04L29/08 ,  H04L7/033

CPC分类号： H04L7/10 ,  G09G5/008 ,  H03L7/095 ,  H04L7/033 ,  H04L7/046

摘要： Provided are a transmission device, a receiving device, and a communication system having a simple configuration and capable of reliably executing the confirmation of a changed bit rate. The communication system 1 sends, to the receiving device 3, a serial data signal S data that is set as a constant value across a period of a constant multiple of a cycle of the clock when a bit rate of a serial data signal S data in the transmission device 2 is changed. The receiving device 3 that received the serial data signal S data receives training data T data from the transmission device 2 when it is determined that the serial data signal S data is a constant value across a period of a constant multiple of a cycle of the clock, and proceeds to the processing of confirming the changed bit rate.

摘要翻译： 提供具有简单配置并能够可靠地执行改变的比特率的确认的发送设备，接收设备和通信系统。 通信系统1将串行数据信号S data的比特率当时钟的周期的常数倍的周期设定为恒定值的串行数据信号S data发送给接收装置3 变速装置2变更。 接收到串行数据信号S data的接收装置3当确定串行数据信号S data是时钟周期的恒定倍数的周期的恒定值时，从发送装置2接收训练数据T数据 并进行确认改变的比特率的处理。