公开(公告)号：EP2408111A1

公开(公告)日：2012-01-18

申请号：EP10750685.9

申请日：2010-02-25

申请人： Thine Electronics, Inc.

发明人： SUZUKI Hajime ,  MIURA Satoshi

IPC分类号： H03K17/22 ,  G06F1/24

摘要： When the value of a power supply voltage (VDD) becomes a first threshold value or higher, a first start-up circuit (20) causes a band gap reference circuit (10) to start a stable operation and a first voltage value (V A ) is output from the band gap reference circuit (10). When the value of the power supply voltage becomes a second threshold value or higher which is greater than the first threshold, a second start-up circuit (40) turns on a PMOS transistor (MP 3 ) of a voltage dividing circuit (30), and a second voltage value (V B ) output from the voltage dividing circuit (30) becomes a value, which is derived by dividing the value of the power supply voltage according to the resistance ratio of resistors (R 31 , R 32 ). From a voltage comparison circuit (50), a reset level voltage value is output when the second voltage value (V B ) is smaller than the first voltage value (V A ), and a power-supply voltage level voltage value is output if the second voltage value (V B ) becomes the first voltage value (V A ) or higher,.

摘要翻译： 当电源电压（VDD）的值成为第一阈值以上时，第一启动电路（20）使带隙基准电路（10）开始稳定动作，第一电压值（VA） 从带隙参考电路（10）输出。 当电源电压的值成为大于第一阈值的第二阈值以上时，第二启动电路（40）导通分压电路（30）的PMOS晶体管（MP 3）， 并且从分压电路（30）输出的第二电压值（VB）成为通过根据电阻器（R 31，R 32）的电阻比除以电源电压值而导出的值。 从电压比较电路（50），当第二电压值（VB）小于第一电压值（VA）时，输出复位电平电压值，如果第二电压值 值（VB）成为第一电压值（VA）以上。