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公开(公告)号:EP3174058B1
公开(公告)日:2019-11-06
申请号:EP15200339.8
申请日:2015-12-16
发明人: Sun, Hongquan
IPC分类号: G11C7/10 , G11C11/4093 , G11C11/4099 , H03K5/08
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公开(公告)号:EP3174055A1
公开(公告)日:2017-05-31
申请号:EP15200330.7
申请日:2015-12-16
发明人: Sun, Hongquan , Xu, Minglu , Xia, Jiajia
IPC分类号: G11C7/10
摘要: A data reception chip coupled to an external memory including a first input-output pin configured to output first data and including a comparison module and a voltage generation module is provided. The comparison module is coupled to the first input-output pin to receive the first data and to compare the first data with a first reference voltage to identify the value of the first data. The voltage generation module is configured to generate the first reference voltage. The voltage generation module includes a first resistor and a second resistor. The second resistor is connected to the first resistor in series. The first and second resistors divide a first operation voltage to generate the first reference voltage.
摘要翻译: 提供了耦合到外部存储器的数据接收芯片,所述外部存储器包括被配置为输出第一数据并包括比较模块和电压产生模块的第一输入输出引脚。 比较模块耦接至第一输入 - 输出引脚以接收第一数据并将第一数据与第一参考电压进行比较以识别第一数据的值。 电压生成模块被配置为生成第一参考电压。 电压产生模块包括第一电阻器和第二电阻器。 第二电阻器串联连接到第一电阻器。 第一和第二电阻器分割第一操作电压以生成第一参考电压。
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公开(公告)号:EP3174058A1
公开(公告)日:2017-05-31
申请号:EP15200339.8
申请日:2015-12-16
发明人: Sun, Hongquan
IPC分类号: G11C7/10
摘要: A data reception chip coupled to an external memory including a first input-output pin to output first data and including a comparison module, a voltage generation module, a logic unit, a detection module and a switching module is provided. The comparison module is coupled to the first input-output pin to configure to receive the first data. The comparison module compares the first data with a first reference voltage to identify the value of the first data. The voltage generation module is configured to generate the first reference voltage. The logic unit is coupled to the comparison module and the voltage generation module and outputs at least one switching signal. The detection module detects the logic unit to generate at least one detection signal. The switching module transmits the detection signal to a test pin according to the switching signal.
摘要翻译: 提供了一种数据接收芯片,其耦合到包括第一输入 - 输出引脚的外部存储器以输出第一数据并且包括比较模块,电压产生模块,逻辑单元,检测模块和切换模块。 比较模块耦合到第一输入 - 输出引脚以配置为接收第一数据。 比较模块将第一数据与第一参考电压进行比较以识别第一数据的值。 电压生成模块被配置为生成第一参考电压。 逻辑单元耦接至比较模块及电压产生模块,并输出至少一切换信号。 检测模块检测逻辑单元以产生至少一个检测信号。 开关模块根据切换信号将检测信号传输至测试引脚。
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公开(公告)号:EP3174055B1
公开(公告)日:2019-11-06
申请号:EP15200330.7
申请日:2015-12-16
发明人: Sun, Hongquan , Xu, Minglu , Xia, Jiajia
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