公开(公告)号：EP0540665A4

公开(公告)日：1993-06-23

申请号：EP91914944

申请日：1991-07-23

申请人： VLSI TECHNOLOGY, INC.

发明人： MARTIN, WILLIAM ,  GOLNABI, HABIB ,  POWERS, TIMOTHY, J.

IPC分类号： G06F5/10 ,  G06F5/14 ,  G11C7/00 ,  G11C7/22 ,  G11C8/06 ,  G11C13/00

CPC分类号： G06F5/14 ,  G06F2205/102 ,  G11C7/22 ,  G11C8/06

摘要： A method and apparatus are disclosed for storing and accessing information of both asynchronous and synchronous devices using, for example, pointers (62, 76) having grey code counters which reduce code conversion logic and which are less susceptible to clock glitches, such as improper clock pulses due to internal circuit timing errors. Because the devices are less clock dependent, they do not require the imposition of critical paths during the placement and routing of a circuit layout. Further, fast and reliable accessing of information stored in memory devices can be achieved by multiplexing (80) output bits addressed, for example, via the aforementioned grey code pointers.