公开(公告)号：EP0722162A2

公开(公告)日：1996-07-17

申请号：EP96100347.2

申请日：1996-01-11

申请人： YAMAHA CORPORATION

发明人： Nakajima, Yasuyoshi ,  Koyama, Masahiro

IPC分类号： G10H7/00 ,  G10H1/12

CPC分类号： G10H7/006 ,  G10H1/125 ,  G10H5/007 ,  G10H7/004 ,  G10H2220/106 ,  G10H2250/161 ,  G10H2250/261 ,  G10H2250/475 ,  G10H2250/481 ,  G10H2250/535 ,  G10H2250/621

摘要： A plurality of digital signal processors (DSP1-DSP4) are provided in parallel relation to each other, and a series of operations for desired sound signal synthesis or processing is divided into a plurality of operation groups to be allocated to the signal processors. First and second buses (PBUS, DBUS) are connected to each of the signal processors so that parameters necessary for the operations are distributively supplied to the signal processors via the first bus (PBUS) and the operation result of each of the signal processors is transferred to another digital signal processor or an output port via the second bus (DBUS). One digital signal processor receives the output data from another digital signal processor via the second bus so as to perform a predetermined operation using the received data. The desired sound signal processing is thus executed by combinations of the operations performed by such signal processors. Where sound signal processing is executed in a plurality of channels on a time-divisional basis, the time-divisional channel timing of each digital signal processor is set independently of that of other digital signal processors. By setting synchronized tone generation designating data for each channel, synchronized tone generation is controllably performed in selected channels.

摘要翻译： 多个数字信号处理器（DSP1-DSP4）彼此并联提供，并且一系列用于期望的声音信号合成或处理的操作被划分为要分配给信号处理器的多个操作组。 第一和第二总线（PBUS，DBUS）连接到每个信号处理器，使得操作所需的参数经由第一总线（PBUS）分配提供给信号处理器，并且每个信号处理器的操作结果被传送 经由第二总线（DBUS）连接到另一个数字信号处理器或输出端口。 一个数字信号处理器经由第二总线从另一个数字信号处理器接收输出数据，以便使用所接收的数据执行预定的操作。 因此，通过这些信号处理器执行的操作的组合来执行期望的声音信号处理。 在以时分为基础在多个通道中执行声音信号处理的情况下，每个数字信号处理器的时分信道定时独立于其它数字信号处理器的时分设置。 通过为每个通道设置同步音产生指定数据，可以在所选择的频道中可控地执行同步音产生。

公开(公告)号：EP0722162B1

公开(公告)日：2001-12-05

申请号：EP96100347.2

申请日：1996-01-11

申请人： YAMAHA CORPORATION

发明人： Nakajima, Yasuyoshi ,  Koyama, Masahiro

IPC分类号： G10H7/00 ,  G10H1/12

CPC分类号： G10H7/006 ,  G10H1/125 ,  G10H5/007 ,  G10H7/004 ,  G10H2220/106 ,  G10H2250/161 ,  G10H2250/261 ,  G10H2250/475 ,  G10H2250/481 ,  G10H2250/535 ,  G10H2250/621

公开(公告)号：EP0722162A3

公开(公告)日：1997-01-15

申请号：EP96100347.2

申请日：1996-01-11

申请人： YAMAHA CORPORATION

发明人： Nakajima, Yasuyoshi ,  Koyama, Masahiro

IPC分类号： G10H7/00 ,  G10H1/12

CPC分类号： G10H7/006 ,  G10H1/125 ,  G10H5/007 ,  G10H7/004 ,  G10H2220/106 ,  G10H2250/161 ,  G10H2250/261 ,  G10H2250/475 ,  G10H2250/481 ,  G10H2250/535 ,  G10H2250/621

摘要： A plurality of digital signal processors (DSP1-DSP4) are provided in parallel relation to each other, and a series of operations for desired sound signal synthesis or processing is divided into a plurality of operation groups to be allocated to the signal processors. First and second buses (PBUS, DBUS) are connected to each of the signal processors so that parameters necessary for the operations are distributively supplied to the signal processors via the first bus (PBUS) and the operation result of each of the signal processors is transferred to another digital signal processor or an output port via the second bus (DBUS). One digital signal processor receives the output data from another digital signal processor via the second bus so as to perform a predetermined operation using the received data. The desired sound signal processing is thus executed by combinations of the operations performed by such signal processors. Where sound signal processing is executed in a plurality of channels on a time-divisional basis, the time-divisional channel timing of each digital signal processor is set independently of that of other digital signal processors. By setting synchronized tone generation designating data for each channel, synchronized tone generation is controllably performed in selected channels.