公开(公告)号：EP2555078B1

公开(公告)日：2014-06-25

申请号：EP11176474.2

申请日：2011-08-03

申请人： ams AG

发明人： Paglino, Lorenzo ,  Verri, Simone

IPC分类号： G05F3/26 ,  G05F3/30

CPC分类号： G05F3/262 ,  G05F3/16 ,  G05F3/20 ,  G05F3/26 ,  G05F3/30

摘要： Reference circuit arrangement according to this invention comprises a branched current path (BE) connecting a first and second terminal (T+, T-) via an intermediate terminal (TN). The intermediate terminal (TN) is connected to a reference terminal (GND). A current path (PTAT) is coupled between the first and second terminal (T+, T-) via the reference terminal (GND). A feedback loop (FB) is connected to the first and second terminal (T+, T-) and designed to control, at the first and second terminal (T+, T-), a virtual ground potential. A reference path (REF) is connected to the feedback loop (FB) having a reference input for receiving from the feedback loop a reference current (Iref) and reference output (Vref) to provide a reference voltage.