摘要:
The invention relates to a connection interface comprising a circuit arrangement, for associating incoming data messages with available information, comprising a means for comparing incoming messages with available information and for storing available information. To this end, the means comprises a plurality of comparison elements with which a respective memory is associated, said respective memories together forming a storage element for storing information relating to non-associated messages, and the comparison elements are designed to compare, in parallel, incoming messages with the information stored in the respective memories thereof.
摘要:
Present application relates to a sensor data access system, a sensor data access system comprising a plurality of domains including plurality of hardware domains and at least one sensor hardware domain on a system-on-chip. Each domain is hard-isolated from another domain. The sensor hardware domain is connected with the plurality of hardware domains respectively through inter-processor communication module, the sensor hardware domain has at least one sensor module. The sensor module is used for receiving sensor data for autonomous driving. The plurality of the hardware domains include a first hardware domain and a second hardware domain provided on the same system-on-chip. The first hardware domain acquires sensor data from the sensor hardware domain, and the second hardware domain also acquires sensor data from the sensor hardware domain. Sensor sharing can be achieved without importing virtual machine technology, thereby reducing the cost of implementing autonomous driving.
摘要:
Described are systems and methods for interconnecting devices. A switch fabric is in communication with a plurality of electronic devices. A rendezvous memory is in communication with the switch fabric. Data is transferred to the rendezvous memory from a first electronic device of the plurality of electronic devices in response to a determination that the data is ready for output from a memory at the first electronic device and in response to a location allocated in the rendezvous memory for the data.
摘要:
The invention relates to a switch unit (10) for an Ethernet network (1), comprising a switch (14) and a microprocessor (15), wherein the switch (14) has at least three ports (PA-PD), which are connected to inputs and outputs (EA/A-EA/D) of the switch unit (10). Between the ports (PA-PD) and the inputs and outputs (EA/A-EA/D) of the switch unit (10), one each signal detector and signal generator (16) for detecting and initiating a bus activity is arranged, wherein the switch unit (10) further has a memory unit (17). In the memory unit (17), for each input and output (EA/A-EA/D), an allocation rule to the other inputs and outputs (EA/A-EA/D) of the switch unit (10) is stored, wherein the switch unit (10) is configured such that upon detecting a bus activity on a signal detector and signal generator (16), the allocated inputs and outputs (EA/A-EA/D) of this input and output (EA/A-EA/D) are selected from the memory unit (17), and the associated signal detectors and signal generators (16) are woken up such that the latter themselves generate a bus activity at their inputs and outputs (EA/A-EA/D). The invention further relates to an Ethernet network (1) having such a switch unit (10), and to a method for activating components.
摘要:
Described are systems and methods for interconnecting devices. A switch fabric is in communication with a plurality of electronic devices. A rendezvous memory is in communication with the switch fabric. Data is transferred to the rendezvous memory from a first electronic device of the plurality of electronic devices in response to a determination that the data is ready for output from a memory at the first electronic device and in response to a location allocated in the rendezvous memory for the data.