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公开(公告)号：EP2680418B1
公开(公告)日：2018-09-12
申请号：EP12199798.5
申请日：2012-12-31
申请人： Macroblock, Inc.
发明人： Chang, Lon-Kou , Huang, Yi-Wen , Huang, Han-Hsiang
CPC分类号： G05F1/70 , H02M3/137 , H02M3/335 , Y02B70/1433 , Y02P80/112
摘要： A common-core power factor correction resonant converter includes an energy-transforming circuit. The energy-transforming circuit receives an input line voltage and generates an output power. The energy-transforming circuit includes a coupling inductor and a charge-storage capacitor. The coupling inductor and the charge-storage capacitor are charged by the input line voltage in response to a control signal, so as to generate a charge-storage capacitor voltage. When the charge-storage capacitor voltage is charged to a preset voltage level, the coupling inductor and the charge-storage capacitor are discharged according to the control signal. Then, the energy in the coupling inductor and the charge-storage capacitor is transformed to the output load and provide the output voltage or current regulation.
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公开(公告)号：EP3044863A1
公开(公告)日：2016-07-20
申请号：EP13892797.5
申请日：2013-09-09
发明人： MING, Xiao , JIAN, Wang
CPC分类号： H03K5/08 , H02H9/041 , H03K3/02337 , H03K5/2481
摘要： A circuit includes a comparator to generate a clamp output signal by monitoring an output voltage and a reference voltage that sets a clamp voltage threshold for the output voltage. The clamp output signal is employed to limit an input voltage from exceeding the clamp voltage threshold. A first switch supplies the reference voltage to the comparator. The first switch forms a portion of an intrinsic delay circuit with a first feedback path in the comparator to mitigate ripple in the output voltage. A second switch is coupled to the input voltage and a second feedback path in the comparator. The second switch forms another portion of the intrinsic delay circuit with the first switch, the first feedback path, and the second feedback path in the comparator to further mitigate ripple in the output voltage.
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公开(公告)号：EP2839720A4
公开(公告)日：2016-03-02
申请号：EP13778182
申请日：2013-04-19
CPC分类号： H05B37/03 , H02J9/02 , H05B33/0815 , H05B41/28
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公开(公告)号：EP2680418A2
公开(公告)日：2014-01-01
申请号：EP12199798.5
申请日：2012-12-31
申请人： Macroblock, Inc.
发明人： Chang, Lon-Kou , Huang, Yi-Wen , Huang, Han-Hsiang
CPC分类号： G05F1/70 , H02M3/137 , H02M3/335 , Y02B70/1433 , Y02P80/112
摘要： A common-core power factor correction resonant converter includes an energy-transforming circuit. The energy-transforming circuit receives an input line voltage and generates an output power. The energy-transforming circuit includes a coupling inductor and a charge-storage capacitor. The coupling inductor and the charge-storage capacitor are charged by the input line voltage in response to a control signal, so as to generate a charge-storage capacitor voltage. When the charge-storage capacitor voltage is charged to a preset voltage level, the coupling inductor and the charge-storage capacitor are discharged according to the control signal. Then, the energy in the coupling inductor and the charge-storage capacitor is transformed to the output load and provide the output voltage or current regulation.
摘要翻译： 共芯功率因数校正谐振转换器包括能量转换电路。 能量转换电路接收输入线电压并产生输出功率。 能量转换电路包括耦合电感器和电荷存储电容器。 响应于控制信号，耦合电感器和电荷存储电容器由输入线电压充电，以便产生电荷存储电容器电压。 当电荷储存电容器电压被充电到预设电压电平时，耦合电感器和电荷储存电容器根据控制信号而放电。 然后，耦合电感和电荷储存电容中的能量转换为输出负载，并提供输出电压或电流调节。
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5.发明公开PROCÉDÉ ET DISPOSITIF DE DÉTERMINATION DE LA VALEUR D'UNE GRANDEUR CARACTÉRISTIQUE D'UN SYSTÈME D'ALIMENTATION D'UNE CHARGE 审中-公开支持A-定义预VALUE FOR签名方法和器件尺寸从去年供应系统
公开(公告)号：EP2550539A1
公开(公告)日：2013-01-30
申请号：EP11715977.2
申请日：2011-03-23
发明人： GOLLENTZ, Bernard , PERON, Régis , GIROD, Daniel
摘要： Said method predetermines the value for a characteristic quantity (U1dc, U2dc) from a load-supplying system that includes M DC-to-DC converters, connected in series to the terminals of the load and located at the outlet of a DC current power supply, and includes at least one storage capacitor. Said predetermination method includes: measuring, with a first high resolution, a plurality of values for a first characteristic quantity (1e); measuring, with a low resolution, a value for a second characteristic quantity (U1dc, U2dc); and predetermining, with a second high resolution, a value for the second characteristic quantity (U1dc, U2dc) on the basis of the plurality of values measured, with the first high resolution, for the first characteristic quantity (1e) and on the basis of the value measured, with the low resolution, for the second characteristic quantity (U1dc, U2dc). The first and second high resolutions are at least 10 times greater than the low resolution.
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公开(公告)号：EP4367785A1
公开(公告)日：2024-05-15
申请号：EP22838189.3
申请日：2022-05-04
发明人： HANLEY, John T.
CPC分类号： H02M3/156 , H02M1/0032
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公开(公告)号：EP3704789A1
公开(公告)日：2020-09-09
申请号：EP18830508.0
申请日：2018-10-24
申请人： Letina, Drazen
发明人： Letina, Drazen
IPC分类号： H02M3/137
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公开(公告)号：EP2136460B1
公开(公告)日：2019-10-09
申请号：EP09162608.5
申请日：2009-06-12
申请人： Macroblock, Inc.
发明人： Chen, Yaow-Ming , Shih, Fu-Yang
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公开(公告)号：EP3257144A1
公开(公告)日：2017-12-20
申请号：EP16749561.3
申请日：2016-01-12
申请人： Intel Corporation
IPC分类号： H02M3/137
CPC分类号： G05F3/08 , G06F1/26 , H02M3/1584 , H02M2001/0045 , H02M2001/007 , H02M2001/008
摘要： The present disclosure provides a power delivery scheme to provide a parallel regulation feature for integrated voltage regulators (IVRs).
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公开(公告)号：EP3238332A2
公开(公告)日：2017-11-01
申请号：EP15884162.7
申请日：2015-12-10
申请人： Intel Corporation
IPC分类号： H02M3/137
CPC分类号： H02M3/158 , H02M3/07 , H02M2001/0045
摘要： One embodiment provides an apparatus. The apparatus includes a selectable-mode voltage regulator (VR) to implement one or more of a plurality of VR modes. The selectable-mode VR includes a plurality of switches, an inductor (L), a flying capacitor (Cf), and an output capacitor (Cout).
摘要翻译： 一个实施例提供一种装置。 该装置包括可选模式电压调节器（VR）以实现多个VR模式中的一个或多个。 可选择模式VR包括多个开关，电感器（L），快速电容器（Cf）和输出电容器（Cout）。
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