公开(公告)号：EP0103410A3

公开(公告)日：1986-02-12

申请号：EP83304669

申请日：1983-08-12

申请人： NORTHERN TELECOM LIMITED

发明人： Bennett, Jeffrey Henry

IPC分类号： H03F03/00 ,  H03H19/00

CPC分类号： H03H19/004

摘要： ©7 A differential output is provided from a single-ended input by a switch-capacitor stage having a through-switched capacitor (12) coupled via an amplifier (7) to one output terminal (1) and a diagonally-switched capacitor (12) coupled via an amplifier (7) to another output terminal (2). Each amplifier (7) is provided with a through-switched negative feedback capacitor (9). A delay inherent in the switching of the diagonally-switched capacitor (12) provides an interpolation effect in the differential output.

公开(公告)号：EP0138260A3

公开(公告)日：1987-07-15

申请号：EP84201369

申请日：1984-09-25

申请人： AMERICAN MICROSYSTEMS, INCORPORATED

发明人： Gregorian, Roubik ,  Fotouhi, Bahram

IPC分类号： H03G01/00 ,  H03G01/04 ,  H03F03/00

CPC分类号： H03F1/303 ,  H03G1/04

摘要： A novel switched capacitor gain stage uses a unique circuit design and clocking technique that reduces the component mismatch offset voltage and the clock-induced feedthrough offset voltage produced by the circuit. The totalcapac- itance ratio between the input capacitors and the feedback capacitor necessary to achieve a desired total gain is also minimized.