摘要:
Conversion of an RF signal amplifier from an unbalanced signal configuration to a balanced signal configuration is provided while including an image trap for both sides of the balanced circuit. The grounded side of the secondary of a double tuned circuit (14,16,18,20,22) is lifted from ground to provide a balanced circuit configuration. A trap filter is provided in the balanced circuit configuration by a pair of small capacitors (CS1,CS2) coupled between the balanced secondary leads (26a,26b) to appropriate signal nodes.
摘要:
A voltage controlled oscillator includes: a voltage controlled oscillation circuit (1), an oscillation frequency thereof being controlled by a control voltage signal; a PLL circuit (2) that generates a control voltage signal to be input to the voltage controlled oscillation circuit (1); a multiplier circuit (3) that multiplies an oscillation signal output from the voltage controlled oscillation circuit (1); and a band-pass filter and trap circuit (4) that sets a pass band for passing a signal with a predetermined multiplication number of multiplication signals output from the multiplier circuit (3) and a trap frequency equal to the frequency of the oscillation signal input to the multiplier circuit (3), and varies the pass band and the trap frequency in synchronization with the control voltage signal.
摘要:
Electrical circuitry is useful for thermomechanical analysis apparatus. A sine-type wave force signal is generated by combining a triangular wave with an alternating wave equal in magnitude to about half of the square of the triangular wave. The triangular wave is generated with a control voltage proportional to the operating frequency. A response wave of the apparatus is amplified by an active filter circuit with corner frequencies approximately equal to each other and proportional to the operating frequency to process the wave independently of frequency. The force wave and response wave are converted to square waves which are combined to form pulsed time signals representing a phase difference for each half cycle. A pair of analog switches are receptive of the control voltage and responsive to the respective time signals to feed a switched output to an integrating capacitor such that successive voltage levels are effected in proportion to the time signals and the control voltage. Sample hold modules receptive of the voltage levels effect a steady voltage output representative of average phase shift independently of operating frequency and any time-varying DC level in the response wave.
摘要:
A method of electrical balancing in a three-phase system is disclosed. The steps are: obtaining the magnitude and phase of each line-to-neutral output voltage; aligning a first line-to-neutral voltage with the real axis; choosing two voltages and adding a third voltage complex conjugate of the greater of the two previous voltages; calculating the positive sequence, the negative sequence and the zero sequence; cancelling the negative sequence; calculating the positive sequence and zero sequence of the new line-to-neutral voltage system; adding positive sequence voltage and zero sequence voltage to the positive sequence and zero sequence; calculating the new line-to-neutral voltages from the new positive sequence voltage and the new zero sequence voltage, with negative sequence voltage equal to zero; repeating the two previous steps until the module of the new third line-to-neutral voltage is equal to the module of the line-to-neutral output voltage discarded in the third step.
摘要:
In a double-tuning circuit including a primary tuning circuit having a first inductor (1) and a first variable capacitive element (3) connected in parallel and a secondary tuning circuit having a second inductor (2) and a second variable capacitive element (4) connected in parallel, a fixed part of a copper-foil pattern (11) is connected to a connection point at which the double-tuning circuit is connected to an input terminal of a frequency mixing circuit (24), and a tip part (11a) of the copper-foil pattern (11) extends to near the first inductor (1), whereby a trap circuit for attenuating an image frequency component is formed. A pattern (L) is formed between a ground-side terminal of the first inductor (1) and the ground, and a capacitor (31) is connected between a connection point at which the first inductor (1) is connected to one terminal of the pattern (L) and a ground-side terminal of the second variable capacitive element (4).