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公开(公告)号：EP4462984A1
公开(公告)日：2024-11-13
申请号：EP22963021.5
申请日：2022-10-25
发明人： FENG, Xuehuan , LI, Yongqian
IPC分类号： H10K59/131 , G09G3/20
摘要： A display panel, comprising: a substrate (101), and a gate drive circuit (40), a plurality of clock signal lines, and a plurality of connection lines (51) which are provided on the substrate (101). The plurality of clock signal lines are located on one side of the gate drive circuit (40) in a first direction (X) and are sequentially arranged. Each connection line (51) is electrically connected to the gate drive circuit (40) and a clock signal line. At least one connection line (51) comprises a load adjustment portion (512), wherein the load adjustment portion (512) is configured to compensate for a load difference between different clock signal lines. The orthographic projection of the load adjustment portion (512) of the at least one connection line (51) on the substrate (101) at least partially overlaps the orthographic projection of the at least one clock signal line on the substrate (101).
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公开(公告)号：EP4460171A1
公开(公告)日：2024-11-06
申请号：EP23794942.5
申请日：2023-03-30
发明人： WANG, Mengqi , YU, Ziyang , JIANG, Zhiliang , WANG, Rong , HU, Ming , QIU, Haijun , DONG, Xiangdan , YAN, Jun , HE, Fan
IPC分类号： H10K59/131 , G09F9/33
摘要： Embodiments of the present disclosure provide a display substrate and a display device, which relate to the technical field of display, and can lower the cost of the display substrate while reducing the frame width of the display substrate. The display substrate comprises multiple conductive layers. The multiple conductive layers comprise multiple data lines, multiple connection lines and multiple fan-out lines. The connection lines cross at least one data line and are insulated from the crossed data line. The first fan-out lines are electrically connected to the connection lines, and the second fan-out lines are electrically connected to one end of the second data line that is close to the fan-out area. The first fan-out lines comprise adapter lines. The fan-out area comprises a first fan-out area and a second fan-out area, and the adapter lines are located in the second fan-out area. The adapter lines and the multiple second fan-out lines are located on different conductive layers and cross at least one second fan-out line, such that the arrangement sequence of the ends of the multiple fan-out lines away from the display area in the first direction is the same as the arrangement sequence of the multiple data lines in the first direction. The display substrate provided by the embodiments of the present disclosure can be used in the display device.
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公开(公告)号：EP4459606A1
公开(公告)日：2024-11-06
申请号：EP24190101.6
申请日：2019-10-23
发明人： LEE, Minku , KA, Jihyun , LEE, Kwangsae
IPC分类号： G09G3/3233 , H10K59/131
摘要： A display panel comprising a substrate including a display area surrounding an opening area and a non-display area between the opening area and the display area; a plurality of display elements on the display area; a plurality of scan lines extending in a first direction and detouring around an edge of the opening area; a plurality of data lines extending in a second direction that intersects with the first direction, the plurality of data lines detouring around the edge of the opening area; a plurality of emission control lines extending in the first direction and detouring around the edge of the opening area; a plurality of initialization voltage lines spaced apart from each other around the opening area; and an electrode layer on the non-display area and having a ring shape in a plan view, wherein the plurality of initialization voltage lines are electrically connected to each other through the electrode layer.
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公开(公告)号：EP3493285B1
公开(公告)日：2024-11-06
申请号：EP18209266.8
申请日：2018-11-29
发明人： CHO, Yoon-jong , SEONG, Seokje , LEE, Seongjun , SHIN, Yoonjee , YUN, Suyeon , JEONG, Wooho , CHOI, Joonhoo
IPC分类号： H10K59/131 , H10K77/10 , H10K50/844 , H01L27/12 , H10K102/00
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公开(公告)号：EP4429439A3
公开(公告)日：2024-10-23
申请号：EP24153980.8
申请日：2024-01-25
发明人： Cho, Jae Hyung
IPC分类号： H10K59/121 , H10K59/131
摘要： A light emitting display device according to an embodiment includes a display area (DA) that includes a plurality of pixel circuit portions (PC), a plurality of light emitting diodes (LED) electrically connected to the plurality of pixel circuit portions (PC), respectively, and a valley portion (VLY) that is disposed in the display area (DA), surrounds at least one of the plurality of pixel circuit portions (PC) to partition the plurality of pixel circuit portions (PC) into a plurality of regions, and includes at least one valley portion opening (VLYo).
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公开(公告)号：EP4447642A1
公开(公告)日：2024-10-16
申请号：EP24166194.1
申请日：2024-03-26
发明人： LEE, Seung Min , KIM, Dong Jo , KIM, Young Ji , KIM, Hyun , SONG, Si Joon , YOO, Je Won
IPC分类号： H10K59/131 , H10K77/10
摘要： A display device includes: a substrate comprising an open portion; a pad portion on the substrate and exposed through the open portion; a fanout line integrally formed with the pad portion; a data line electrically connected to the fanout line; a flexible film under the substrate and comprising a lead electrode inserted into the open portion of the substrate to directly contact the pad portion; and a contact portion covering a lower surface of the lead electrode and a lower surface of the pad portion to electrically connect the lead electrode and the pad portion.
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公开(公告)号：EP4447641A1
公开(公告)日：2024-10-16
申请号：EP24165886.3
申请日：2024-03-25
发明人： HSU, KUO-CHENG , CHU, KER TAI , CHEN, HUEI-SIOU
IPC分类号： H10K59/131 , H10K59/124 , H10K59/80 , H10K50/844
摘要： The disclosure provides a display device including a substrate, a first interconnection metal layer, a second interconnection metal layer, a passivation layer, a first through via, a second through via, a first electrode and a bonding pad. The substrate includes active and border regions. The first interconnection metal layer is disposed on the substrate and located in the active region. The second interconnection metal layer is disposed on the substrate and located in the border region. The passivation layer is disposed on the first and second interconnection metal layers. The first through via passes through the passivation layer and is electrically connected to the first interconnection metal layer. The second through via passes through the passivation layer and is electrically connected to the second interconnection metal layer. The first electrode is disposed on the first through via. The bonding pad is disposed on the second through via.
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公开(公告)号：EP4447640A1
公开(公告)日：2024-10-16
申请号：EP22947224.6
申请日：2022-06-21
发明人： ZHANG, Tiaomei , YU, Ziyang , CHEN, Wenbo
IPC分类号： H10K59/131
摘要： Provided in the present disclosure is a display panel. The display panel comprises: a first conductive layer (2), a second active layer (4), a third conductive layer (5), a dielectric layer and a fourth conductive layer (6), wherein the first conductive layer (2) comprises a first conductive portion (21), the second active layer (4) comprises an eighth active portion (48), the fourth conductive layer (6) comprises a first bridge portion (61), and the first bridge portion (61) is respectively connected to the eighth active portion (48) and the first conductive portion (21) by means of via holes. A first gate line (G1) comprises a first extension portion (51), and an orthographic projection of the first extension portion (51) on a base substrate is located on an orthographic projection of the first bridge portion (61) on the base substrate. The first extension portion (51) comprises a first side edge (511) and a second side edge (512), which are arranged opposite each other and extension directions of which are the same, and the orthographic projection of the first bridge portion (61) on the base substrate perpendicularly intersects with an orthographic projection of the first side edge (511) on the base substrate and an orthographic projection of the second side edge (512) on the base substrate. Therefore, a dielectric layer may be prevented from being broken.
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公开(公告)号：EP4009372B1
公开(公告)日：2024-10-16
申请号：EP19933243.8
申请日：2019-08-01
发明人： LONG, Yue , HUANG, Weiyun , ZENG, Chao , HUANG, Yao , LI, Meng
IPC分类号： H10K59/131
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10.发明公开
公开(公告)号：EP4411706A3
公开(公告)日：2024-10-02
申请号：EP23181158.9
申请日：2023-06-23
发明人： SEO, Hee-Jeong , KIM, Woo-Chul , CHOI, Deok Jun
IPC分类号： G09G3/20 , H10K59/131 , G09G3/32
CPC分类号： G09G2300/042620130101 , G09G2300/041320130101 , G09G2300/045220130101 , G09G3/20 , G09G2370/0820130101 , G09G2310/027520130101 , H10K59/131 , G09G3/32
摘要： A display device includes first data lines including first color data lines connected to first sub-pixels, second color data lines connected to second sub-pixels, and third color data lines connected to third sub-pixels, and fan out lines including first fan out lines, second fan out lines alternately arranged with the first fan out lines in a peripheral region, and third fan out lines, a data driver outputting data voltages to the first fan out lines and the second fan out lines connected to the first data lines in a first arrangement according to the first arrangement, and output the data voltages to the third fan out lines connected to the first data lines in a second arrangement according to the second arrangement, and a timing controller remapping input image data based on the first arrangement.
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