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    HARDWARE ACCELERATED MACHINE LEARNING
    2.
    发明公开
    HARDWARE ACCELERATED MACHINE LEARNING 审中-公开

    公开(公告)号：EP4220380A1

    公开(公告)日：2023-08-02

    申请号：EP23163158.1

    申请日：2017-01-06

    Applicant: INTEL Corporation

    Inventor： Bruestle, Jeremy ,  Ng, Choong

    IPC: G06F7/544 ,  G06F7/483 ,  G06F7/76 ,  G06F7/02 ,  G06N3/063 ,  G06N3/08 ,  G06N20/00

    Abstract: Some embodiments of the present disclose relates to an apparatus with a CPU, a bus to couple the CPU to a DRAM; and a machine-learning hardware accelerator coupled to the CPU. The machine-learning accelerator comprises, among others, a plurality of operation units to perform a plurality of parallel MAC operations in accordance with a vector MAC instruction including an operation value indicating a MAC operation, an indication of a first plurality of the real numbers of the first multidimensional array and a second plurality of the real numbers of the second multidimensional array, and permutation information; and circuitry to permute the first plurality of the real numbers of the first multidimensional array in accordance with the permutation information to generate a permuted first plurality of real numbers. Each operation unit comprises: a multiplier to multiply a first real number of the permuted first plurality of real numbers and a corresponding second real number of a second plurality of the real numbers associated with the second multidimensional array to generate a product, and an accumulator to add the product to an accumulation value to generate a result value, the first real number and the second real number each having a first bit width and the accumulation value having a second bit width at least twice the first bit width.

    METHODS AND SYSTEMS FOR FIXED INTERPOLATION ERROR DATA SIMPLIFICATION PROCESSES FOR TELEMATICS
    5.
    发明公开
    METHODS AND SYSTEMS FOR FIXED INTERPOLATION ERROR DATA SIMPLIFICATION PROCESSES FOR TELEMATICS 审中-公开

    公开(公告)号：EP3945411A1

    公开(公告)日：2022-02-02

    申请号：EP21181966.9

    申请日：2021-06-28

    Applicant: GEOTAB Inc.

    Inventor： Sukhov, Alexey ,  Frincu, Cristian ,  Beams, Darren Marc Lohmann

    IPC: G06F7/02 ,  G06F7/544

    Abstract: Methods and systems for simplifying data collected from assets are provided. An example method involves receiving a set of simplified data at a server. The simplified set of data is generated by application of a dataset simplification algorithm on raw data obtained from a data source at an asset upon satisfaction of a data logging trigger, wherein the dataset simplification algorithm causes interpolation error within the simplified set of data to be limited by an upper bound that is fixed across the simplified set of data. The method further involves receiving a request for a status of the asset and interpolating a status of the asset based on the simplified set of data in response to the request.

    CALCULATION PROCESSING APPARATUS, PROGRAM, AND METHOD OF CONTROLLING THE CALCULATION PROCESSING APPARATUS
    8.
    发明公开
    CALCULATION PROCESSING APPARATUS, PROGRAM, AND METHOD OF CONTROLLING THE CALCULATION PROCESSING APPARATUS 审中-公开

    公开(公告)号：EP3686733A1

    公开(公告)日：2020-07-29

    申请号：EP19218090.9

    申请日：2019-12-19

    Applicant: FUJITSU LIMITED

    Inventor： NOTSU, Takahiro

    IPC: G06F7/02 ,  G06N3/04

    Abstract: A calculation processing apparatus includes: a first output unit configured to compare an input value with a boundary value and output a value equal to the input value when the input value exceeds the boundary value; and a second output unit configured to output, in a calculation of a rectified linear function by which a certain output value is output in a case where the input value is smaller than or equal to the boundary value, a multiple of a small value ε larger than 0 when the input value is smaller than or equal to the boundary value as an output value.

    APPARATUS AND METHOD FOR EXECUTING VECTOR COMPARISON OPERATION
    9.
    发明公开
    APPARATUS AND METHOD FOR EXECUTING VECTOR COMPARISON OPERATION 审中-公开

    公开(公告)号：EP3451151A1

    公开(公告)日：2019-03-06

    申请号：EP16899906.8

    申请日：2016-05-05

    Applicant: Cambricon Technologies Corporation Limited

    Inventor： HAN, Dong ,  ZHANG, Xiao ,  LIU, Shaoli ,  CHEN, Tianshi ,  CHEN, Yunji

    IPC: G06F7/02

    Abstract: An apparatus and a method for executing a comparison operation on vectors are provided. The apparatus includes a storing unit, a register unit, a control unit, and a vector comparing unit. The storing unit is configured to store vector data associated with a vector comparison operation instruction. The register unit is configured to store scalar data associated with the vector comparison operation instruction. The control unit is configured to decode the vector comparison operation instruction and to control an operation process of the vector comparison operation instruction. The vector comparing unit is configured to execute a vector comparison operation on two input vector data to be compared according to the vector comparison operation instruction decoded, where the vector comparing unit is implemented in a customized hardware circuit. With aid of technical solutions of the disclosure, a complete process of the vector comparison operation instruction can be realized by the customized hardware circuit, that is, the vector comparison operation can be realized by one vector comparison operation instruction.

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