Power circuit pattern wiring width generation system and its generation method

    公开(公告)号:JP2004145645A

    公开(公告)日:2004-05-20

    申请号:JP2002309726

    申请日:2002-10-24

    Abstract: PROBLEM TO BE SOLVED: To provide a power circuit pattern wiring width generation system and method for automatically performing calculation of a power circuit pattern wiring width, instead of conventional calculation of the wiring width by a worker, when forming a power circuit pattern on a printed circuit board.
    SOLUTION: A table showing the relation between the power supply capacity and the wiring width of the power circuit pattern is installed in the system beforehand, and then the pattern wiring width is calculated from data on part connection information, wiring length, the number of layers, and the power supply capacity, as well as from the the table.
    COPYRIGHT: (C)2004,JPO

    Processing structure for cable slack

    公开(公告)号:JP2004080885A

    公开(公告)日:2004-03-11

    申请号:JP2002236461

    申请日:2002-08-14

    Inventor: MUTO JUNICHI

    Abstract: PROBLEM TO BE SOLVED: To provide a processing structure for cable slack, capable of accommodating excess lengths of a number of optical cables connected with a communication device so that they do not become obstacles. SOLUTION: A lower-stage cable support 10 is attached horizontally to the back surface of a fan unit 2, provided at an upper part of the back surface of the communication device 1, and has four lower-stage cable-placing parts 17. The respective lower-stage cable placing parts 17 retain a loop 21 of the optical cables 20 with four wire saddles 11. The upper-stage cable support 13 has four leg parts 15, and the lower parts of the leg parts 15 are inserted in attachment holes 12, provided at the lower-stage cable support 10 to be mounted on the lower-stage cable placing parts 17. The upper surface of the upper-stage cable support 13 is an upper-stage cable placing part 34, and retains the loop 21 of the optical fiber cables 20 with four wire saddles 14. COPYRIGHT: (C)2004,JPO

    Clock distribution circuit
    55.
    发明专利

    公开(公告)号:JP2004030339A

    公开(公告)日:2004-01-29

    申请号:JP2002186945

    申请日:2002-06-26

    Inventor: YOSHINO RIICHI

    Abstract: PROBLEM TO BE SOLVED: To distribute a clock to a circuit which performs two-way data transmission through a data transmission line without being restricted by the length and transmission frequency of the data transmission line in . SOLUTION: A clock transmission line 41 for transmitting the clock to data transmission circuits 1 and 2 has the same characteristic as that of the data transmission line 3, one end of the clock transmission line 41 is connected to an input-output port P1 of a clock transmission control part 42, and the other end is connected to an input-output port P2 of the clock transmission control part 42 via a clock input port 15 of the data transmission circuit 1 and a clock input port 25 of the data transmission circuit 2. The length of the clock transmission line between the clock input ports 15 and 25 is set in the same length as that of the data transmission line 3. The clock transmission control part 42 transmits the clock to the clock transmission line 41 so as to transmit the clock in the same direction as a data transmission direction shown by a transmission direction control signal Sc and makes the clock returning from the clock transmission line input to a termination resistor 43 with the same value as that of a characteristic impedance of the data transmission line. COPYRIGHT: (C)2004,JPO

    Station power supply corresponding digital subscriber circuit for open circuit detection and open detection method that

    公开(公告)号:JP3471656B2

    公开(公告)日:2003-12-02

    申请号:JP11287499

    申请日:1999-04-20

    CPC classification number: Y02D70/00

    Abstract: PROBLEM TO BE SOLVED: To detect opening with stable operation without increasing power consumption. SOLUTION: A saturated voltage between the emitter and collector of a transistor 8 is made smaller than the sum of a cutoff voltage between the emitter and base of a transistor 3 and the forward voltage of a diode 6, when a current flowing to the transistor 8 is decreased, a current flowing to the collector side of the transistor 3 is detected by photodiodes 4-1 and 4-2 of a photocoupler and opening detecting signals are outputted from opening detecting signal sending terminals 11-1 and 11-2.

    Abstract translation: 要解决的问题:在不增加功耗的情况下稳定运行来检测打开。 解决方案:当流到晶体管8的电流时,使晶体管8的发射极和集电极之间的饱和电压小于晶体管3的发射极和基极之间的截止电压和二极管6的正向电压之和 通过光电耦合器的光电二极管4-1和4-2检测流到晶体管3的集电极侧的电流,并从开路检测信号发送端子11-1和11-2输出开路检测信号。

    Method and apparatus for contact-type measurement of coplanarity
    58.
    发明专利
    Method and apparatus for contact-type measurement of coplanarity 审中-公开
    用于接触式测量的方法和装置

    公开(公告)号:JP2003337019A

    公开(公告)日:2003-11-28

    申请号:JP2002144179

    申请日:2002-05-20

    Inventor: SATO TETSUYA

    Abstract: PROBLEM TO BE SOLVED: To quickly measure a coplanarity by a low-cost installation.
    SOLUTION: When a height of a solder ball (an object to be measured) 20 on a wiring board 22 is measured by a laser displacement sensor 1, one end face of a pin (a contacting piece) 21 arranged so as to correspond to each solder ball 20 is brought into contact with the solder ball 20, and the other end face of the pin 21 is measured by the sensor 1. The pin 21 is held by a jig mainframe 23 so as to be movable in the up-and-down direction, and it is moved up and down according to a height in a top part of the solder ball 20. The upper and lower end faces of the pin 21 are formed to be flat, and the height in the top part of the solder ball 20 is reflected faithfully so as to be measured surely by the sensor 1. Consequently, even when a shape of the object to be measured is spherical, the coplanarity in the top part of the object to be measured is measured easily when the pin 21 is brought into contact with the object to be measured.
    COPYRIGHT: (C)2004,JPO

    Abstract translation: 要解决的问题:通过低成本安装快速测量共面性。 解决方案:当通过激光位移传感器1测量布线板22上的焊球(待测物体20)的高度时,将销(接触片)21的一个端面设置为 对应于每个焊球20与焊球20接触,并且销21的另一个端面由传感器1测量。销21由夹具主机23保持,以便可以向上移动 并且根据焊球20的顶部的高度上下移动。销21的上端面和下端面形成为平坦的,顶部的高度 焊球20被忠实地反射,以便由传感器1确实地测量。因此,即使当被测量物体的形状是球形时,测量对象的顶部的共面性容易测量, 销21与要测量的物体接触。 版权所有(C)2004,JPO

    Power consumption reduction method and the electronic exchange system of the unit power supply corresponding isdn subscriber circuit in the electronic exchange

    公开(公告)号:JP3459901B2

    公开(公告)日:2003-10-27

    申请号:JP2000182478

    申请日:2000-06-19

    Inventor: 文博 金野

    CPC classification number: Y02D70/00

    Abstract: PROBLEM TO BE SOLVED: To provide an electronic switchboard system to enable reduction of power consumption and power equipment. SOLUTION: A private subscriber terminal 5 is driven by DC current formed by rectifying a commercial power source, a PS bit to be included in terminal information transmitted from the private subscriber terminal 5 to an ISDN subscriber circuit 2 dealing with station power supply is analyzed by a PS bit monitoring device 3 installed in the ISDN subscriber circuit 2 dealing with station power supply, when the commercial power source to be supplied to the private subscriber terminal 5 is judged to be interrupted as a result of this analysis, a station power source 4 installed in the ISDN subscriber circuit 2 dealing with station power supply is controlled by the PS bit monitoring device 3 and power is supplied from the station power supply 4 to the private subscriber terminal 5 via an outside transmission line 6.

    Abstract translation: 要解决的问题:提供一种电子配电盘系统,以减少功耗和电力设备。 解决方案:私有用户终端5由整流商用电源形成的直流电驱动,包含在从专用用户终端5发送到终端信息的终端信息中的PS位与处理站电源的ISDN用户电路2分析 安装在处理台站电源的ISDN用户电路2中的PS位监视装置3,作为该分析的结果,当判定要提供给专用用户终端5的商用电源被中断时,站电源4 处理站电源的ISDN用户电路2中安装的PS位监视装置3控制电力,并且经由外部传输线6从站电源4向专用用户终端5供电。

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