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    Method of manufacturing semiconductor substrate
    61.
    发明专利
    Method of manufacturing semiconductor substrate 有权
    制造半导体基板的方法

    公开(公告)号：JP2010239048A

    公开(公告)日：2010-10-21

    申请号：JP2009087526

    申请日：2009-03-31

    申请人： Dowa Holdings Co Ltd ,  Dowaホールディングス株式会社 ,  Furukawa Co Ltd ,  Mitsubishi Chemicals Corp ,  Tohoku Techno Arch Co Ltd ,  Wavesquare Inc ,  ウェーブスクエア, インコーポレイテッド ,  三菱化学株式会社 ,  古河機械金属株式会社 ,  株式会社 東北テクノアーチ

    发明人： YAO TAKAFUMI ,  CHO MEOUNG WHAN

    IPC分类号： H01L21/205 ,  C23C16/02 ,  C23C16/04 ,  C23C16/34 ,  C30B25/04 ,  C30B29/38 ,  C30B33/08

    摘要： PROBLEM TO BE SOLVED: To reduce cracking when a crystal body of a group III nitride semiconductor is grown. SOLUTION: A method of manufacturing a semiconductor substrate includes a metal layer forming step of forming a metal layer on a ground substrate, a mask forming step of forming a mask including a plurality of openings exposing the metal layer and a non-opening part not exposing the metal layer, a nitriding step of forming a plurality of first buffer layers of metal nitride by nitriding a plurality of regions of the metal layer exposed through the plurality of openings, a second buffer forming step of forming a plurality of second buffer layers of a group III nitride semiconductor on the plurality of first buffer layers, and a growing step of growing the crystal body of the group III nitride semiconductor on the plurality of second buffer layers. The plurality of openings are in a shape conforming with a hexagon. In the mask forming step, the mask is formed so that the plurality of openings each have a minimum width of 5 to 25 μm, and the non-opening part between adjacent openings has a width of 1.5 to 8 μm. COPYRIGHT: (C)2011,JPO&INPIT

    摘要翻译： 要解决的问题：为了减少III族氮化物半导体的晶体生长时的开裂。 解决方案：制造半导体衬底的方法包括在接地衬底上形成金属层的金属层形成步骤，形成掩模的掩模形成步骤，所述掩模形成步骤包括暴露金属层的多个开口和不开口 不暴露金属层的部分，通过氮化多个通过多个开口露出的金属层的区域而形成多个第一金属氮化物缓冲层的氮化步骤，形成多个第二缓冲层的第二缓冲剂形成步骤 在所述多个第一缓冲层上的III族氮化物半导体的层，以及在所述多个第二缓冲层上生长所述III族氮化物半导体的晶体的生长步骤。 多个开口具有与六边形相符的形状。 在掩模形成步骤中，形成掩模，使得多个开口各自具有最小宽度为5至25μm，并且相邻开口之间的非开口部分具有1.5至8μm的宽度。 版权所有（C）2011，JPO＆INPIT

    Conductive material and method for producing the same
    67.
    发明专利
    Conductive material and method for producing the same 有权
    导电材料及其制造方法

    公开(公告)号：JP2010064925A

    公开(公告)日：2010-03-25

    申请号：JP2008232877

    申请日：2008-09-11

    申请人： Dowa Holdings Co Ltd ,  Dowaホールディングス株式会社 ,  Tohoku Univ ,  国立大学法人東北大学

    发明人： SATO YOSHITOMO ,  TAJI KAZUYUKI ,  NAMURA MASARU

    IPC分类号： C01B31/02 ,  H01B5/02 ,  H01B13/00 ,  H01M4/96

    CPC分类号： Y02E60/50

    摘要： PROBLEM TO BE SOLVED: To provide a conductive material using a carbon nanotube which has conductivity higher than that of a carbon nanotube, and to provide a method for producing the same.
    SOLUTION: Soot comprising a single-wall carbon nanotube is produced by arc discharge so as to be refined, a single-wall carbon nanotube thin film is produced from the refined single-wall carbon nanotube, thereafter, conductive metal fine particles such as silver nanoparticles are stuck to the surface of the single-wall carbon nanotube thin film, and subsequently, the conductive metal fine particles are sintered by annealing treatment so as to produce a conductive material.
    COPYRIGHT: (C)2010,JPO&INPIT

    摘要翻译： 要解决的问题：提供使用导电率高于碳纳米管的导电性的导电材料，并提供其制造方法。 解决方案：通过电弧放电产生包含单壁碳纳米管的烟灰以进行精制，由精制的单壁碳纳米管制备单壁碳纳米管薄膜，之后，将导电金属微粒如 因为银纳米颗粒粘附到单壁碳纳米管薄膜的表面，接着通过退火处理烧结导电金属微粒，从而制成导电材料。 版权所有（C）2010，JPO＆INPIT