公开(公告)号：US20060198480A1

公开(公告)日：2006-09-07

申请号：US11072562

申请日：2005-03-04

申请人： David Doyle ,  Hossain Hajimowlana ,  Kevin Gagne ,  Joseph Bastos ,  Chirag Patel

发明人： David Doyle ,  Hossain Hajimowlana ,  Kevin Gagne ,  Joseph Bastos ,  Chirag Patel

IPC分类号： H04L7/00

CPC分类号： H03L7/0814 ,  H03L7/091 ,  H04L7/033

摘要： An apparatus, method, and article to dynamically adjust a data signal using a regenerated clock signal in an emulator to increase communication speed between the emulator and the evaluation board is disclosed. In one embodiment, this is achieved by applying a reference clock signal at a predetermined frequency to a digital circuit. A delayed return data signal is then sampled from the digital circuit. The sampled delayed return data signal is then compared to an expected return data signal. The delayed return data signal is then adjusted as a function of the comparison to increase the communication speed between the emulator and the evaluation board.

公开(公告)号：US07526054B2

公开(公告)日：2009-04-28

申请号：US11072562

申请日：2005-03-04

申请人： David Doyle ,  Hossain Hajimowlana ,  Kevin Gagne ,  Joseph Bastos ,  Chirag Patel

发明人： David Doyle ,  Hossain Hajimowlana ,  Kevin Gagne ,  Joseph Bastos ,  Chirag Patel

IPC分类号： H04L7/00

CPC分类号： H03L7/0814 ,  H03L7/091 ,  H04L7/033

摘要： An apparatus, method, and article to dynamically adjust a data signal using a regenerated clock signal in an emulator to increase communication speed between the emulator and the evaluation board is disclosed. In one embodiment, this is achieved by applying a reference clock signal at a predetermined frequency to a digital circuit. A delayed return data signal is then sampled from the digital circuit. The sampled delayed return data signal is then compared to an expected return data signal. The delayed return data signal is then adjusted as a function of the comparison to increase the communication speed between the emulator and the evaluation board.

摘要翻译： 公开了一种使用仿真器中的再生时钟信号动态调整数据信号以提高仿真器与评估板之间的通信速度的装置，方法和文章。 在一个实施例中，这通过将预定频率的参考时钟信号施加到数字电路来实现。 然后从数字电路对延迟返回数据信号进行采样。 然后将采样的延迟返回数据信号与期望的返回数据信号进行比较。 然后根据比较调整延迟返回数据信号，以增加仿真器与评估板之间的通信速度。

公开(公告)号：US20090202028A1

公开(公告)日：2009-08-13

申请号：US12428162

申请日：2009-04-22

申请人： David DOYLE ,  Hossain HAJIMOWLANA ,  Kevin GAGNE ,  Joseph BASTOS ,  Chirag PATEL

发明人： David DOYLE ,  Hossain HAJIMOWLANA ,  Kevin GAGNE ,  Joseph BASTOS ,  Chirag PATEL

IPC分类号： H04L7/00

CPC分类号： H03L7/0814 ,  H03L7/091 ,  H04L7/033

摘要： An apparatus, method, and article to dynamically adjust a data signal using a regenerated clock signal in an emulator to increase communication speed between the emulator and the evaluation board is disclosed. In one embodiment, this is achieved by applying a reference clock signal at a predetermined frequency to a digital circuit. A delayed return data signal is then sampled from the digital circuit. The sampled delayed return data signal is then compared to an expected return data signal. The delayed return data signal is then adjusted as a function of the comparison to increase the communication speed between the emulator and the evaluation board.

摘要翻译： 公开了一种使用仿真器中的再生时钟信号动态调整数据信号以提高仿真器与评估板之间的通信速度的装置，方法和文章。 在一个实施例中，这通过将预定频率的参考时钟信号施加到数字电路来实现。 然后从数字电路对延迟返回数据信号进行采样。 然后将采样的延迟返回数据信号与期望的返回数据信号进行比较。 然后根据比较调整延迟返回数据信号，以增加仿真器与评估板之间的通信速度。