Test mode circuitry for a programmable tamper detection circuit
    1.
    发明授权
    Test mode circuitry for a programmable tamper detection circuit 有权
    用于可编程篡改检测电路的测试模式电路

    公开(公告)号:US07978095B2

    公开(公告)日:2011-07-12

    申请号:US11473451

    申请日:2006-06-23

    IPC分类号: G08B13/14

    CPC分类号: G11C16/20 G11C16/22 G11C17/16

    摘要: An integrated circuit includes an output pad, an alarm output pad, and a test mode output pad. A first multi-bit register is programmable to store programmable data such as data that identifies a customer for whom the integrated circuit has been manufactured. A second multi-bit register is programmable to store customer specified threshold data. A first circuit selectively couples the first and second multi-bit registers to the output pad. The first circuit is operable responsive to the integrated circuit being placed into a test mode to perform parallel-to-serial conversion of either the customer identification data stored in the first multi-bit register or the customer specified threshold data stored in the second multi-bit register and drive the converted data for output through the output pad. The integrated circuit further includes a tamper detection circuit operable responsive to the customer specified threshold data to generate a tamper alarm signal. A second circuit selectively couples the tamper alarm signal to the alarm output pad and test mode output pad depending on whether the integrated circuit is in a test mode. More specifically, the second circuit operates to drive the alarm output pad with the tamper alarm signal when the integrated circuit is not in test mode and drive the test mode output pad with the tamper alarm signal when the integrated circuit is in test mode (with the alarm output pad driven to a known state).

    摘要翻译: 集成电路包括输出焊盘,报警输出焊盘和测试模式输出焊盘。 第一个多位寄存器是可编程的,用于存储可编程数据,例如识别已经制造了集成电路的客户的数据。 可编程第二个多位寄存器来存储客户指定的阈值数据。 第一电路将第一和第二多位寄存器选择性地耦合到输出焊盘。 第一电路可操作地响应于集成电路被放置在测试模式中,以执行存储在第一多位寄存器中的客户识别数据或存储在第二多位寄存器中的客户指定的阈值数据的并行 - 串行转换, 位寄存器,并通过输出板驱动转换后的数据输出。 集成电路还包括可响应于客户指定的阈值数据操作的篡改检测电路,以产生篡改报警信号。 第二电路根据集成电路是否处于测试模式,选择性地将篡改报警信号耦合到报警输出焊盘和测试模式输出焊盘。 更具体地,当集成电路不处于测试模式时,第二电路用于驱动具有篡改报警信号的报警输出板,并且当集成电路处于测试模式时驱动具有篡改报警信号的测试模式输出板 报警输出板驱动到已知状态)。

    Test mode circuitry for a programmable tamper detection circuit
    2.
    发明申请
    Test mode circuitry for a programmable tamper detection circuit 有权
    用于可编程篡改检测电路的测试模式电路

    公开(公告)号:US20070115122A1

    公开(公告)日:2007-05-24

    申请号:US11473451

    申请日:2006-06-23

    IPC分类号: G08B13/14 G08B21/00 G05B19/00

    CPC分类号: G11C16/20 G11C16/22 G11C17/16

    摘要: An integrated circuit includes an output pad, an alarm output pad, and a test mode output pad. A first multi-bit register is programmable to store programmable data such as data that identifies a customer for whom the integrated circuit has been manufactured. A second multi-bit register is programmable to store customer specified threshold data. A first circuit selectively couples the first and second multi-bit registers to the output pad. The first circuit is operable responsive to the integrated circuit being placed into a test mode to perform parallel-to-serial conversion of either the customer identification data stored in the first multi-bit register or the customer specified threshold data stored in the second multi-bit register and drive the converted data for output through the output pad. The integrated circuit further includes a tamper detection circuit operable responsive to the customer specified threshold data to generate a tamper alarm signal. A second circuit selectively couples the tamper alarm signal to the alarm output pad and test mode output pad depending on whether the integrated circuit is in a test mode. More specifically, the second circuit operates to drive the alarm output pad with the tamper alarm signal when the integrated circuit is not in test mode and drive the test mode output pad with the tamper alarm signal when the integrated circuit is in test mode (with the alarm output pad driven to a known state).

    摘要翻译: 集成电路包括输出焊盘,报警输出焊盘和测试模式输出焊盘。 第一个多位寄存器是可编程的,用于存储可编程数据,例如识别已经制造了集成电路的客户的数据。 可编程第二个多位寄存器来存储客户指定的阈值数据。 第一电路将第一和第二多位寄存器选择性地耦合到输出焊盘。 第一电路可操作地响应于集成电路被放置在测试模式中,以执行存储在第一多位寄存器中的客户识别数据或存储在第二多位寄存器中的客户指定的阈值数据的并行 - 串行转换, 位寄存器,并通过输出板驱动转换后的数据输出。 集成电路还包括可响应于客户指定的阈值数据操作的篡改检测电路,以产生篡改报警信号。 第二电路根据集成电路是否处于测试模式,选择性地将篡改报警信号耦合到报警输出焊盘和测试模式输出焊盘。 更具体地,当集成电路不处于测试模式时,第二电路用于驱动具有篡改报警信号的报警输出板,并且当集成电路处于测试模式时驱动具有篡改报警信号的测试模式输出板 报警输出板驱动到已知状态)。

    Test mode circuitry for a programmable tamper detection circuit
    4.
    发明授权
    Test mode circuitry for a programmable tamper detection circuit 有权
    用于可编程篡改检测电路的测试模式电路

    公开(公告)号:US08827165B2

    公开(公告)日:2014-09-09

    申请号:US13039832

    申请日:2011-03-03

    CPC分类号: G11C16/20 G11C16/22 G11C17/16

    摘要: An integrated circuit includes an output pad, an alarm output pad, and a test mode output pad. A first multi-bit register is programmable to store programmable data such as data that identifies a customer for whom the integrated circuit has been manufactured. A second multi-bit register is programmable to store customer specified threshold data. A first circuit selectively couples the first and second multi-bit registers to the output pad. The first circuit is operable responsive to the integrated circuit being placed into a test mode to perform parallel-to-serial conversion of either the customer identification data stored in the first multi-bit register or the customer specified threshold data stored in the second multi-bit register and drive the converted data for output through the output pad. The integrated circuit further includes a tamper detection circuit operable responsive to the customer specified threshold data to generate a tamper alarm signal. A second circuit selectively couples the tamper alarm signal to the alarm output pad and test mode output pad depending on whether the integrated circuit is in a test mode. More specifically, the second circuit operates to drive the alarm output pad with the tamper alarm signal when the integrated circuit is not in test mode and drive the test mode output pad with the tamper alarm signal when the integrated circuit is in test mode (with the alarm output pad driven to a known state).

    摘要翻译: 集成电路包括输出焊盘,报警输出焊盘和测试模式输出焊盘。 第一个多位寄存器是可编程的,用于存储可编程数据,例如识别已经制造了集成电路的客户的数据。 可编程第二个多位寄存器来存储客户指定的阈值数据。 第一电路将第一和第二多位寄存器选择性地耦合到输出焊盘。 第一电路可操作地响应于集成电路被放置在测试模式中,以执行存储在第一多位寄存器中的客户识别数据或存储在第二多位寄存器中的客户指定的阈值数据的并行 - 串行转换, 位寄存器,并通过输出板驱动转换后的数据输出。 集成电路还包括可响应于客户指定的阈值数据操作的篡改检测电路,以产生篡改报警信号。 第二电路根据集成电路是否处于测试模式,选择性地将篡改报警信号耦合到报警输出焊盘和测试模式输出焊盘。 更具体地,当集成电路不处于测试模式时,第二电路用于驱动具有篡改报警信号的报警输出板,并且当集成电路处于测试模式时驱动具有篡改报警信号的测试模式输出板 报警输出板驱动到已知状态)。

    TEST MODE CIRCUITRY FOR A PROGRAMMABLE TAMPER DETECTION CIRCUIT
    5.
    发明申请
    TEST MODE CIRCUITRY FOR A PROGRAMMABLE TAMPER DETECTION CIRCUIT 有权
    用于可编程阻尼器检测电路的测试模式电路

    公开(公告)号:US20110148620A1

    公开(公告)日:2011-06-23

    申请号:US13039832

    申请日:2011-03-03

    IPC分类号: G08B29/00

    CPC分类号: G11C16/20 G11C16/22 G11C17/16

    摘要: An integrated circuit includes an output pad, an alarm output pad, and a test mode output pad. A first multi-bit register is programmable to store programmable data such as data that identifies a customer for whom the integrated circuit has been manufactured. A second multi-bit register is programmable to store customer specified threshold data. A first circuit selectively couples the first and second multi-bit registers to the output pad. The first circuit is operable responsive to the integrated circuit being placed into a test mode to perform parallel-to-serial conversion of either the customer identification data stored in the first multi-bit register or the customer specified threshold data stored in the second multi-bit register and drive the converted data for output through the output pad. The integrated circuit further includes a tamper detection circuit operable responsive to the customer specified threshold data to generate a tamper alarm signal. A second circuit selectively couples the tamper alarm signal to the alarm output pad and test mode output pad depending on whether the integrated circuit is in a test mode. More specifically, the second circuit operates to drive the alarm output pad with the tamper alarm signal when the integrated circuit is not in test mode and drive the test mode output pad with the tamper alarm signal when the integrated circuit is in test mode (with the alarm output pad driven to a known state).

    摘要翻译: 集成电路包括输出焊盘,报警输出焊盘和测试模式输出焊盘。 第一个多位寄存器是可编程的,用于存储可编程数据,例如识别已经制造了集成电路的客户的数据。 可编程第二个多位寄存器来存储客户指定的阈值数据。 第一电路将第一和第二多位寄存器选择性地耦合到输出焊盘。 第一电路可操作地响应于集成电路被放置在测试模式中,以执行存储在第一多位寄存器中的客户识别数据或存储在第二多位寄存器中的客户指定的阈值数据的并行 - 串行转换, 位寄存器,并通过输出板驱动转换后的数据输出。 集成电路还包括可响应于客户指定的阈值数据操作的篡改检测电路,以产生篡改报警信号。 第二电路根据集成电路是否处于测试模式,选择性地将篡改报警信号耦合到报警输出焊盘和测试模式输出焊盘。 更具体地,当集成电路不处于测试模式时,第二电路用于驱动具有篡改报警信号的报警输出板,并且当集成电路处于测试模式时驱动具有篡改报警信号的测试模式输出板 报警输出板驱动到已知状态)。