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公开(公告)号:US06664808B2
公开(公告)日:2003-12-16
申请号:US09924365
申请日:2001-08-07
申请人: Zhi-Min Ling , Jae Cho , Robert W. Wells , Clay S. Johnson , Shelly G. Davis
发明人: Zhi-Min Ling , Jae Cho , Robert W. Wells , Clay S. Johnson , Shelly G. Davis
IPC分类号: H03K19177
CPC分类号: G01R31/318519
摘要: FPGAs that contain at least one localized defect may be used to implement some designs if the localized defect is not used in the designs. To determine if the FPGA is suitable to implement a design, the design is loaded into the FPGA. The FPGA is tested to determine whether it can execute the design accurately even with the localized defect. The FPGA will be marked as suitable for that design if it passes the test. If the FPGA is found to be unsuitable for one design, additional designs may be tested. Thus, a FPGA manufacturer can sell FPGAs that are normally discarded. As a result, the price of these FPGAs could be set significantly low.