公开(公告)号：US20080225990A1

公开(公告)日：2008-09-18

申请号：US12132022

申请日：2008-06-03

Applicant: Troy James Beukema ,  Brian Allan Floyd ,  Scott Kevin Reynolds ,  Sergey V. Rylov

Inventor： Troy James Beukema ,  Brian Allan Floyd ,  Scott Kevin Reynolds ,  Sergey V. Rylov

IPC: H04L27/22

CPC classification number: H04L27/2273 ,  H04L1/206 ,  H04L27/0014 ,  H04L2027/0057

Abstract: An apparatus and method to control signal phase in a radio device includes a phase rotator configured to control a phase of a local oscillator. A phase error determination module is configured to determine phase error information based on received in-phase (I) and quadrature (Q) (IQ) signal values. A phase correction module is configured to derive from the received IQ signal values a correction signal and apply the correction signal to the phase rotator in a path of the local oscillator.

Abstract translation: 控制无线电设备中的信号相位的装置和方法包括配置成控制本地振荡器的相位的相位旋转器。 相位误差确定模块被配置为基于接收到的同相（I）和正交（Q）（IQ）信号值来确定相位误差信息。 相位校正模块被配置为从所接收的IQ信号值导出校正信号，并将校正信号施加到本地振荡器的路径中的相位旋转器。

公开(公告)号：US20100046683A1

公开(公告)日：2010-02-25

申请号：US12194571

申请日：2008-08-20

Applicant: Troy James Beukema ,  William Richard Kelly

Inventor： Troy James Beukema ,  William Richard Kelly

IPC: H04L7/00

CPC classification number: H04L7/0062

Abstract: Systems and methods for adaptive clock and equalization control are provided for data receivers, which are based on a “closed loop” sampling clock framework that employs controllable and dynamically adapted time offsets on both local data and amplitude clocks. The controllable clock offsets are dynamically adapted using signal processing methods adapted to achieve optimum sampling of data and amplitude sampling clock signals to accurately detect data bits and optimize system equalization settings, including, decision-feedback equalizer and/or an optional linear equalizer preceding a decision-feedback equalizer.

Abstract translation: 为数据接收机提供自适应时钟和均衡控制的系统和方法，数据接收机基于“闭环”采样时钟框架，在本地数据和幅度时钟上采用可控和动态调整的时间偏移。 使用适于实现数据和振幅采样时钟信号的最佳采样以精确地检测数据位并优化系统均衡设置的信号处理方法来动态地适应可控时钟偏移，包括判决反馈均衡器和/或可能的线性均衡器 反馈均衡器

公开(公告)号：US6128510A

公开(公告)日：2000-10-03

申请号：US855502

申请日：1997-05-13

Applicant: Troy James Beukema ,  Michael Frank Cina ,  Ephraim Bemis Flint ,  Brian Paul Gaucher ,  Young Hoon Kwark ,  Modest Michael Oprysko ,  William Edward Pence ,  Saila Ponnapalli

Inventor： Troy James Beukema ,  Michael Frank Cina ,  Ephraim Bemis Flint ,  Brian Paul Gaucher ,  Young Hoon Kwark ,  Modest Michael Oprysko ,  William Edward Pence ,  Saila Ponnapalli

IPC: H04M1/725 ,  H04M11/00 ,  H04W4/18 ,  H04W24/00 ,  H04W68/00 ,  H04W76/02 ,  H04W84/10 ,  H04W88/08 ,  H04Q7/20

CPC classification number: H04W68/00 ,  H04M1/725 ,  H04W24/00 ,  H04W4/18 ,  H04W76/02 ,  H04W84/10 ,  H04W88/08

Abstract: A cordless modem comprises a radio pair interfaced to a standard data/fax modem which allows a user of a personal computer to wirelessly connect to a telephone line. One end of the radio pair is a remote unit interfaced to the modem contained within the PC while the other end is a base unit connected to a standard telephone wall jack. The base unit can selectively discriminate and adjust for signals received from a telephone voice handset or data signals received from the cordless modem remote unit. Upon receiving an off-hook signal or an incoming call signal, the base unit identifies the type of data (i.e., voice or computer modem data) and adapts accordingly by placing an FM modulator in either of a narrow band deviation or a wide band deviation covering the required range of the particular signal combined with local echo. That is, when voice data is present, a low deviation, narrow filter combination is selected. If, on the other hand, the computer data from the cordless modem is detected, a higher deviation, wider bandwidth filter is selected. In addition, the remote unit switches a pre-detection filter from one mode to another depending on whether it is connected to a computer modem or to a voice handset. Security from eavesdroppers as well as the mitigation of signal fading is provided by overlaying a pseudo-random number (PN) code on the FM modulated signal.

Abstract translation: 无线调制解调器包括接口到标准数据/传真调制解调器的无线电对，其允许个人计算机的用户无线地连接到电话线。 无线电对的一端是与包含在PC内的调制解调器接口的远程单元，而另一端是连接到标准电话墙壁插座的基座单元。 基本单元可以有选择地识别和调整从电话语音手机接收的信号或从无绳调制解调器远程单元接收的数据信号。 在接收到摘机信号或来电信号时，基本单元识别数据的类型（即语音或计算机调制解调器数据），并通过将FM调制器置于窄带偏差或宽带偏差 涵盖特定信号与本地回波结合的所需范围。 也就是说，当存在语音数据时，选择低偏差，窄的滤波器组合。 另一方面，如果检测到来自无绳调制解调器的计算机数据，则选择较高偏差的较宽带宽滤波器。 此外，远程单元根据是否连接到计算机调制解调器或语音手机将预检测滤波器从一种模式切换到另一种模式。 通过在FM调制信号上重叠伪随机数（PN）码来提供来自窃听者的安全性以及信号衰落的减轻。

公开(公告)号：US08135100B2

公开(公告)日：2012-03-13

申请号：US12194571

申请日：2008-08-20

Applicant: Troy James Beukema ,  William Richard Kelly

Inventor： Troy James Beukema ,  William Richard Kelly

IPC: H04B1/10

CPC classification number: H04L7/0062

Abstract: Systems and methods for adaptive clock and equalization control are provided for data receivers, which are based on a “closed loop” sampling clock framework that employs controllable and dynamically adapted time offsets on both local data and amplitude clocks. The controllable clock offsets are dynamically adapted using signal processing methods adapted to achieve optimum sampling of data and amplitude sampling clock signals to accurately detect data bits and optimize system equalization settings, including, decision-feedback equalizer and/or an optional linear equalizer preceding a decision-feedback equalizer.

Abstract translation: 为数据接收机提供自适应时钟和均衡控制的系统和方法，数据接收机基于“闭环”采样时钟框架，在本地数据和幅度时钟上采用可控和动态调整的时间偏移。 使用适于实现数据和振幅采样时钟信号的最佳采样以精确地检测数据位并优化系统均衡设置的信号处理方法来动态地适应可控时钟偏移，包括判决反馈均衡器和/或可能的线性均衡器 反馈均衡器

公开(公告)号：US08000384B2

公开(公告)日：2011-08-16

申请号：US12032610

申请日：2008-02-15

Applicant: Troy James Beukema ,  William Richard Kelly

Inventor： Troy James Beukema ,  William Richard Kelly

IPC: H03K5/159

CPC classification number: H04L25/0307 ,  H04L25/03343 ,  H04L2025/037

Abstract: Illustrative embodiments provide a computer implemented method and an apparatus for data decorrelation in a line equalizer adaptive system. The apparatus comprises an input and an output, forming a data path there between, wherein the input capable of receiving data to create received data and the output capable of sending data. The apparatus further comprises an adaptive equalizer capable of equalizing the received data, connected to the data path, and a synchronous decorrelator connected to the data path, in communication with the adaptive equalizer, wherein the synchronous decorrelator evaluates an adapt enable output for each received data input to the adaptive equalizer to determine whether the adaptive equalizer can update settings of the line equalizer adaptive system.

Abstract translation: 示例性实施例提供了一种计算机实现的方法和用于线路均衡器自适应系统中的数据去相关的装置。 该装置包括输入和输出，在其间形成数据路径，其中能够接收数据以创建接收数据的输入端和能够发送数据的输出。 该装置还包括一个自适应均衡器，该自适应均衡器能够与连接到数据路径的接收数据和连接到数据路径的同步去相关器进行均衡，该自适应均衡器与自适应均衡器通信，其中同步去相关器评估每个接收数据的适配使能输出 输入到自适应均衡器以确定自适应均衡器是否可以更新线路均衡器自适应系统的设置。

公开(公告)号：US07733980B2

公开(公告)日：2010-06-08

申请号：US11486539

申请日：2006-07-14

Applicant: Troy James Beukema ,  Alberto Valdes Garcia ,  Scott Kevin Reynolds

Inventor： Troy James Beukema ,  Alberto Valdes Garcia ,  Scott Kevin Reynolds

IPC: H03C1/52

CPC classification number: H04L27/0008 ,  H04L27/04 ,  H04L27/2014 ,  H04L27/2057 ,  H04L27/206 ,  H04L27/362

Abstract: A quadrature modulation circuit includes a mixer circuit including an integrated sign modulation control circuit and a plurality of mixer ports. The mixer ports include a first input port, a second input port, an output port and a sign modulation control port. The modulation circuit generates a modulated signal by operation of the mixer circuit multiplying a modulating signal applied to the first input port with a carrier signal applied to the second input port to generate a mixed signal output from the output port, and by operation of the integrated sign modulation control circuit controlling polarity switching of a signal at one of the mixer ports in response to a sign modulation control signal input to the sign modulation control port.

Abstract translation: 正交调制电路包括具有集成符号调制控制电路和多个混频器端口的混频电路。 混频器端口包括第一输入端口，第二输入端口，输出端口和符号调制控制端口。 调制电路通过使施加到第一输入端口的调制信号与施加到第二输入端口的载波信号相乘的混频器电路的操作产生调制信号，以产生从输出端口输出的混合信号，并且通过集成 符号调制控制电路，响应于输入到符号调制控制端口的符号调制控制信号，控制混频器端口之一处的信号的极性切换。

公开(公告)号：US06219356B1

公开(公告)日：2001-04-17

申请号：US08965895

申请日：1997-11-07

Applicant: Troy James Beukema

Inventor： Troy James Beukema

IPC: H04J306

CPC classification number: H04J13/12 ,  H04B2201/709709 ,  H04J13/004

Abstract: A method for multipath resistant waveform coding is provided. The method adds a chip extension to an optimally designed waveform set to compensate for an expected time shift in the radio channel during the transmission and demodulation of the transmitted waveform. The chip extension can be added to the beginning and/or end of the input waveform. The number of chip extensions added is based on the expected multipath time delay in the radio channel. The chip extension method can be used in BPSK, QPSK, QBPSK, and a modified Quadrature-BPSK encoding scheme.

Abstract translation: 提供了一种多径抗波形编码方法。 该方法将芯片扩展添加到最佳设计的波形集合中，以补偿传输和解调传输波形期间无线电信道中的预期时间偏移。 芯片扩展可以添加到输入波形的开始和/或结束。 所添加的芯片扩展的数量是基于无线电信道中预期的多径时延。 芯片扩展方法可用于BPSK，QPSK，QBPSK和修正的正交BPSK编码方案。

公开(公告)号：US09137070B2

公开(公告)日：2015-09-15

申请号：US12132022

申请日：2008-06-03

Applicant: Troy James Beukema ,  Brian Allan Floyd ,  Scott Kevin Reynolds ,  Sergey V. Rylov

Inventor： Troy James Beukema ,  Brian Allan Floyd ,  Scott Kevin Reynolds ,  Sergey V. Rylov

IPC: H04L27/00 ,  H04L27/227

CPC classification number: H04L27/2273 ,  H04L1/206 ,  H04L27/0014 ,  H04L2027/0057

Abstract: An apparatus and method to control signal phase in a radio device includes a phase rotator configured to control a phase of a local oscillator. A phase error determination module is configured to determine phase error information based on received in-phase (I) and quadrature (Q) (IQ) signal values. A phase correction module is configured to derive from the received IQ signal values a correction signal and apply the correction signal to the phase rotator in a path of the local oscillator.

Abstract translation: 控制无线电设备中的信号相位的装置和方法包括配置成控制本地振荡器的相位的相位旋转器。 相位误差确定模块被配置为基于接收到的同相（I）和正交（Q）（IQ）信号值来确定相位误差信息。 相位校正模块被配置为从所接收的IQ信号值导出校正信号，并将校正信号施加到本地振荡器的路径中的相位旋转器。

公开(公告)号：US20100102895A1

公开(公告)日：2010-04-29

申请号：US11486539

申请日：2006-07-14

Applicant: Troy James Beukema ,  Alberto Valdes Garcia ,  Scott Kevin Reynolds

Inventor： Troy James Beukema ,  Alberto Valdes Garcia ,  Scott Kevin Reynolds

IPC: H04L27/20

CPC classification number: H04L27/0008 ,  H04L27/04 ,  H04L27/2014 ,  H04L27/2057 ,  H04L27/206 ,  H04L27/362

Abstract: Quadrature modulation systems, circuits and methods are provided to support various modulation modes including ASK (amplitude shift key), FSK (frequency shift key) and PSK (phase shift key) modulation at high data rates (e.g., gigabit data rates). For example, a modulation circuit includes a mixer circuit including an integrated sign modulation control circuit and a plurality of mixer ports. The mixer ports include a first input port, a second input port, an output port and a sign modulation control port. The modulation circuit generates a modulated signal by operation of the mixer circuit multiplying a modulating signal applied to the first input port with a carrier signal applied to the second input port to generate a mixed signal output from the output port, and by operation of the integrated sign modulation control circuit controlling polarity switching of a signal at one of the mixer ports in response to a sign modulation control signal input to the sign modulation control port. The sign modulation control signal can be a digital data signal having binary data encoded into the modulated signal.

Abstract translation: 提供正交调制系统，电路和方法以支持在高数据速率（例如，千兆比特数据速率）下的ASK（振幅移位键），FSK（频移键）和PSK（相移键）调制的各种调制模式。 例如，调制电路包括具有集成符号调制控制电路和多个混频器端口的混频电路。 混频器端口包括第一输入端口，第二输入端口，输出端口和符号调制控制端口。 调制电路通过使施加到第一输入端口的调制信号与施加到第二输入端口的载波信号相乘的混频器电路的操作产生调制信号，以产生从输出端口输出的混合信号，并且通过集成 符号调制控制电路，响应于输入到符号调制控制端口的符号调制控制信号，控制混频器端口之一处的信号的极性切换。 符号调制控制信号可以是具有被编码为调制信号的二进制数据的数字数据信号。

公开(公告)号：US20090207900A1

公开(公告)日：2009-08-20

申请号：US12032610

申请日：2008-02-15

Applicant: Troy James Beukema ,  William Richard Kelly

Inventor： Troy James Beukema ,  William Richard Kelly

IPC: H03H7/40 ,  H03K5/159

CPC classification number: H04L25/0307 ,  H04L25/03343 ,  H04L2025/037

Abstract: Illustrative embodiments provide a computer implemented method and an apparatus for data decorrelation in a line equalizer adaptive system. The apparatus comprises an input and an output, forming a data path there between, wherein the input capable of receiving data to create received data and the output capable of sending data. The apparatus further comprises an adaptive equalizer capable of equalizing the received data, connected to the data path, and a synchronous decorrelator connected to the data path, in communication with the adaptive equalizer, wherein the synchronous decorrelator evaluates an adapt enable output for each received data input to the adaptive equalizer to determine whether the adaptive equalizer can update settings of the line equalizer adaptive system.

Abstract translation: 说明性实施例提供了一种计算机实现的方法和用于线路均衡器自适应系统中的数据去相关的装置。 该装置包括输入和输出，在其间形成数据路径，其中能够接收数据以创建接收数据的输入端和能够发送数据的输出。 该装置还包括一个自适应均衡器，该自适应均衡器能够与连接到数据路径的接收数据和连接到数据路径的同步去相关器进行均衡，该自适应均衡器与自适应均衡器通信，其中同步去相关器评估每个接收数据的适配使能输出 输入到自适应均衡器以确定自适应均衡器是否可以更新线路均衡器自适应系统的设置。